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| author | Nathan Binkert <binkertn@umich.edu> | 2004-05-13 08:03:36 -0400 |
|---|---|---|
| committer | Nathan Binkert <binkertn@umich.edu> | 2004-05-13 08:03:36 -0400 |
| commit | 2d8777a79bf3e3e93157ad30514996c3124324ca (patch) | |
| tree | 2c5d0fd30f0c7b3c73c5611d43c7f0da9a14b69a /arch/alpha/ev5.cc | |
| parent | 8bc3ce93cb46c00e82432449a90bc4ed1225afd5 (diff) | |
| download | gem5-2d8777a79bf3e3e93157ad30514996c3124324ca.tar.xz | |
remove the annotation junk
arch/alpha/isa_desc:
remove the annotation junk
Move some code to AlphaPseudo where it belongs
arch/alpha/pseudo_inst.cc:
arch/alpha/pseudo_inst.hh:
remove the annotation junk
add pseudo instruction code that was previously misplaced
--HG--
extra : convert_revision : 97db8402aa34e0bdf044b138c52331fc9e714986
Diffstat (limited to 'arch/alpha/ev5.cc')
| -rw-r--r-- | arch/alpha/ev5.cc | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc index 468acdc55..f037a34ac 100644 --- a/arch/alpha/ev5.cc +++ b/arch/alpha/ev5.cc @@ -1,7 +1,6 @@ /* $Id$ */ #include "targetarch/alpha_memory.hh" -#include "sim/annotation.hh" #ifdef DEBUG #include "sim/debug.hh" #endif @@ -126,8 +125,6 @@ ExecContext::ev5_trap(Fault fault) regs.pc = ipr[AlphaISA::IPR_PAL_BASE] + AlphaISA::fault_addr[fault]; regs.npc = regs.pc + sizeof(MachInst); - - Annotate::Ev5Trap(this, fault); } @@ -359,7 +356,6 @@ ExecContext::setIpr(int idx, uint64_t val) old = ipr[idx]; ipr[idx] = val; kernelStats.context(old, val); - Annotate::Context(this); break; case AlphaISA::IPR_DTB_PTE: @@ -387,11 +383,9 @@ ExecContext::setIpr(int idx, uint64_t val) // only write least significant five bits - interrupt level ipr[idx] = val & 0x1f; kernelStats.swpipl(ipr[idx]); - Annotate::IPL(this, val & 0x1f); break; case AlphaISA::IPR_DTB_CM: - Annotate::ChangeMode(this, (val & 0x18) != 0); kernelStats.mode((val & 0x18) != 0); case AlphaISA::IPR_ICM: |