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author | Nathan Binkert <binkertn@umich.edu> | 2004-11-10 18:44:37 -0500 |
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committer | Nathan Binkert <binkertn@umich.edu> | 2004-11-10 18:44:37 -0500 |
commit | 338513c6812501a4ea3a87d633e16b2ce83923eb (patch) | |
tree | 7dcb39865a594972547716155b082e7e85b56e57 /arch/alpha/ev5.cc | |
parent | ab8409738e0c5279f1900e81e8024deb72b25226 (diff) | |
download | gem5-338513c6812501a4ea3a87d633e16b2ce83923eb.tar.xz |
Use the inPalMode function instead of the PC_PAL macro
--HG--
extra : convert_revision : 58e0a19ba98777e5d2e2572ed02dee1914378ff7
Diffstat (limited to 'arch/alpha/ev5.cc')
-rw-r--r-- | arch/alpha/ev5.cc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc index aa52916b9..34b65a915 100644 --- a/arch/alpha/ev5.cc +++ b/arch/alpha/ev5.cc @@ -176,16 +176,16 @@ ExecContext::ev5_trap(Fault fault) AlphaISA::InternalProcReg *ipr = regs.ipr; // exception restart address - if (fault != Interrupt_Fault || !PC_PAL(regs.pc)) + if (fault != Interrupt_Fault || !inPalMode()) ipr[AlphaISA::IPR_EXC_ADDR] = regs.pc; if (fault == Pal_Fault || fault == Arithmetic_Fault /* || - fault == Interrupt_Fault && !PC_PAL(regs.pc) */) { + fault == Interrupt_Fault && !inPalMode() */) { // traps... skip faulting instruction ipr[AlphaISA::IPR_EXC_ADDR] += 4; } - if (!PC_PAL(regs.pc)) + if (!inPalMode()) AlphaISA::swap_palshadow(®s, true); regs.pc = ipr[AlphaISA::IPR_PAL_BASE] + AlphaISA::fault_addr[fault]; @@ -225,7 +225,7 @@ ExecContext::hwrei() { uint64_t *ipr = regs.ipr; - if (!PC_PAL(regs.pc)) + if (!inPalMode()) return Unimplemented_Opcode_Fault; setNextPC(ipr[AlphaISA::IPR_EXC_ADDR]); |