diff options
| author | Ali Saidi <saidi@eecs.umich.edu> | 2004-06-22 13:48:49 -0400 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2004-06-22 13:48:49 -0400 |
| commit | 4deb81989496b360500985377e8f8c1a2f017b27 (patch) | |
| tree | 20e9a164feb1631c965999ba738999abc4b0a691 /arch/alpha/ev5.cc | |
| parent | 074969f8f16110680de05fca64a6be48aedcdfd8 (diff) | |
| parent | c1e58b6bf6b353f9355aafd8ed2cb86e6d00e32a (diff) | |
| download | gem5-4deb81989496b360500985377e8f8c1a2f017b27.tar.xz | |
pull from head before pushing linux tree
--HG--
extra : convert_revision : 345f91c5c16c69db22035dc716e82fd77041380f
Diffstat (limited to 'arch/alpha/ev5.cc')
| -rw-r--r-- | arch/alpha/ev5.cc | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc index ecf66f4f5..d2ca71b3a 100644 --- a/arch/alpha/ev5.cc +++ b/arch/alpha/ev5.cc @@ -162,6 +162,7 @@ AlphaISA::zeroRegisters(XC *xc) void ExecContext::ev5_trap(Fault fault) { + DPRINTF(Fault, "Fault %s\n", FaultName(fault)); Stats::recordEvent(csprintf("Fault %s", FaultName(fault))); assert(!misspeculating()); @@ -302,11 +303,7 @@ ExecContext::readIpr(int idx, Fault &fault) break; case AlphaISA::IPR_VA: - // SFX: unlocks interrupt status registers retval = ipr[idx]; - - if (!misspeculating()) - regs.intrlock = false; break; case AlphaISA::IPR_VA_FORM: |