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author | Gabe Black <gblack@eecs.umich.edu> | 2006-02-21 20:10:40 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-02-21 20:10:40 -0500 |
commit | 8d80fd1477fa39ebc5bad4ca5c727b2871fd9b8d (patch) | |
tree | aa785d4b846823e1960c7b308e6de1c90cf6fb3f /arch/alpha/ev5.cc | |
parent | 3f7979c99d8dc4f434e3daa2e179616f1669e16e (diff) | |
download | gem5-8d80fd1477fa39ebc5bad4ca5c727b2871fd9b8d.tar.xz |
Changed Fault * to Fault, which is a typedef to FaultBase *, which is the old Fault class renamed.
--HG--
extra : convert_revision : 5b2f457401f8ff94fe39fe071288eb117814b7bb
Diffstat (limited to 'arch/alpha/ev5.cc')
-rw-r--r-- | arch/alpha/ev5.cc | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc index 72f48bfb2..4777907e0 100644 --- a/arch/alpha/ev5.cc +++ b/arch/alpha/ev5.cc @@ -85,7 +85,7 @@ AlphaISA::initCPU(RegFile *regs) // alpha exceptions - value equals trap address, update with MD_FAULT_TYPE // const Addr -AlphaISA::fault_addr(Fault * fault) +AlphaISA::fault_addr(Fault fault) { //Check for the system wide faults if(fault == NoFault) return 0x0000; @@ -177,7 +177,7 @@ AlphaISA::zeroRegisters(CPU *cpu) } void -ExecContext::ev5_trap(Fault * fault) +ExecContext::ev5_trap(Fault fault) { DPRINTF(Fault, "Fault %s at PC: %#x\n", fault->name, regs.pc); cpu->recordEvent(csprintf("Fault %s", fault->name)); @@ -209,7 +209,7 @@ ExecContext::ev5_trap(Fault * fault) void -AlphaISA::intr_post(RegFile *regs, Fault * fault, Addr pc) +AlphaISA::intr_post(RegFile *regs, Fault fault, Addr pc) { InternalProcReg *ipr = regs->ipr; bool use_pc = (fault == NoFault); @@ -235,7 +235,7 @@ AlphaISA::intr_post(RegFile *regs, Fault * fault, Addr pc) // that's it! (orders of magnitude less painful than x86) } -Fault * +Fault ExecContext::hwrei() { uint64_t *ipr = regs.ipr; @@ -259,7 +259,7 @@ ExecContext::hwrei() } uint64_t -ExecContext::readIpr(int idx, Fault * &fault) +ExecContext::readIpr(int idx, Fault &fault) { uint64_t *ipr = regs.ipr; uint64_t retval = 0; // return value, default 0 @@ -370,7 +370,7 @@ ExecContext::readIpr(int idx, Fault * &fault) int break_ipl = -1; #endif -Fault * +Fault ExecContext::setIpr(int idx, uint64_t val) { uint64_t *ipr = regs.ipr; |