summaryrefslogtreecommitdiff
path: root/arch/alpha/ev5.cc
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2006-03-14 16:08:32 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-03-14 16:08:32 -0500
commitfa763d2ecfae16e84a9f9d689d19f746d84d08e3 (patch)
tree52474edfd8d1ab010a376b1eb66f4d9990fe4a54 /arch/alpha/ev5.cc
parentf045b110cf1db6f9fc70589532b48d9cca339897 (diff)
parentefe46430fac2419a02062e3b282324498a55df28 (diff)
downloadgem5-fa763d2ecfae16e84a9f9d689d19f746d84d08e3.tar.xz
Merge m5.eecs.umich.edu:/bk/newmem
into ewok.(none):/home/gblack/m5/newmem cpu/cpu_exec_context.cc: Hand merge --HG-- rename : arch/alpha/registerfile.hh => arch/alpha/regfile.hh extra : convert_revision : bd18966f7c37c67c2bc7ca2633b58f70ce64409c
Diffstat (limited to 'arch/alpha/ev5.cc')
-rw-r--r--arch/alpha/ev5.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc
index 6d45edbff..a5a8851c2 100644
--- a/arch/alpha/ev5.cc
+++ b/arch/alpha/ev5.cc
@@ -134,7 +134,7 @@ AlphaISA::zeroRegisters(CPU *cpu)
// (no longer very clean due to the change in setIntReg() in the
// cpu model. Consider changing later.)
cpu->cpuXC->setIntReg(ZeroReg, 0);
- cpu->cpuXC->setFloatRegDouble(ZeroReg, 0.0);
+ cpu->cpuXC->setFloatReg(ZeroReg, 0.0);
}
Fault