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authorAli Saidi <saidi@eecs.umich.edu>2006-02-28 18:41:04 -0500
committerAli Saidi <saidi@eecs.umich.edu>2006-02-28 18:41:04 -0500
commit26d7b5a4d1ee06ce314093facdbef6389ee1ec55 (patch)
treee3ad5f0bf1052d6b45b01267657cdbe5951b9e2a /arch/alpha/isa/decoder.isa
parent29f50d934549f10b073a5492bd0d441d71534ace (diff)
downloadgem5-26d7b5a4d1ee06ce314093facdbef6389ee1ec55.tar.xz
Add quiesceNs, quiesceTime, quiesceCycles, and m5panic pseudo ops.
This changeset removes a check that prevents quiescing when an interrupt is pending. *** You should only call quiesce if that isn't a problem. *** arch/alpha/isa/decoder.isa: sim/pseudo_inst.cc: sim/pseudo_inst.hh: Add quiesceNs, quiesceCycles, quisceTime and m5panic pseudo ops. These quiesce for a number of ns, cycles, report how long we were quiesced for, and panic the simulator respectively. The latter is added to the panic() function in the console and linux kernel instead of executing an infinite loop until someone notices. cpu/exec_context.cc: cpu/exec_context.hh: Add a quiesce end event to the execution contexted which upon executing wakes up a CPU for quiesceCycles/quiesceNs. util/m5/Makefile: Make the makefile more reasonable util/m5/m5.c: update the m5op executable to use the files from the linux tree util/m5/m5op.S: update m5op.S from linux tree util/m5/m5op.h: update m5op.h from linux tree --HG-- rename : util/m5/m5op.s => util/m5/m5op.S extra : convert_revision : 3be18525e811405b112e33f24a8c4e772d15462d
Diffstat (limited to 'arch/alpha/isa/decoder.isa')
-rw-r--r--arch/alpha/isa/decoder.isa14
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/alpha/isa/decoder.isa b/arch/alpha/isa/decoder.isa
index 37b15416b..b93b6575c 100644
--- a/arch/alpha/isa/decoder.isa
+++ b/arch/alpha/isa/decoder.isa
@@ -1,6 +1,6 @@
// -*- mode:c++ -*-
-// Copyright (c) 2003-2005 The Regents of The University of Michigan
+// Copyright (c) 2003-2006 The Regents of The University of Michigan
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
@@ -758,6 +758,15 @@ decode OPCODE default Unknown::unknown() {
0x01: quiesce({{
AlphaPseudo::quiesce(xc->xcBase());
}}, IsNonSpeculative);
+ 0x02: quiesceNs({{
+ AlphaPseudo::quiesceNs(xc->xcBase(), R16);
+ }}, IsNonSpeculative);
+ 0x03: quiesceCycles({{
+ AlphaPseudo::quiesceCycles(xc->xcBase(), R16);
+ }}, IsNonSpeculative);
+ 0x04: quiesceTime({{
+ R0 = AlphaPseudo::quiesceTime(xc->xcBase());
+ }}, IsNonSpeculative);
0x10: ivlb({{
AlphaPseudo::ivlb(xc->xcBase());
}}, No_OpClass, IsNonSpeculative);
@@ -795,6 +804,9 @@ decode OPCODE default Unknown::unknown() {
0x53: m5addsymbol({{
AlphaPseudo::addsymbol(xc->xcBase(), R16, R17);
}}, IsNonSpeculative);
+ 0x54: m5panic({{
+ panic("M5 panic instruction called.");
+ }}, IsNonSpeculative);
}
}