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authorGabe Black <gblack@eecs.umich.edu>2006-02-21 20:10:40 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-02-21 20:10:40 -0500
commit8d80fd1477fa39ebc5bad4ca5c727b2871fd9b8d (patch)
treeaa785d4b846823e1960c7b308e6de1c90cf6fb3f /arch/alpha/isa/mem.isa
parent3f7979c99d8dc4f434e3daa2e179616f1669e16e (diff)
downloadgem5-8d80fd1477fa39ebc5bad4ca5c727b2871fd9b8d.tar.xz
Changed Fault * to Fault, which is a typedef to FaultBase *, which is the old Fault class renamed.
--HG-- extra : convert_revision : 5b2f457401f8ff94fe39fe071288eb117814b7bb
Diffstat (limited to 'arch/alpha/isa/mem.isa')
-rw-r--r--arch/alpha/isa/mem.isa52
1 files changed, 26 insertions, 26 deletions
diff --git a/arch/alpha/isa/mem.isa b/arch/alpha/isa/mem.isa
index 33b7341ef..61d6ea8fa 100644
--- a/arch/alpha/isa/mem.isa
+++ b/arch/alpha/isa/mem.isa
@@ -173,12 +173,12 @@ def template LoadStoreDeclare {{
def template InitiateAccDeclare {{
- Fault * initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
+ Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
}};
def template CompleteAccDeclare {{
- Fault * completeAcc(uint8_t *, %(CPU_exec_context)s *, Trace::InstRecord *) const;
+ Fault completeAcc(uint8_t *, %(CPU_exec_context)s *, Trace::InstRecord *) const;
}};
@@ -208,12 +208,12 @@ def template LoadStoreConstructor {{
def template EACompExecute {{
- Fault *
+ Fault
%(class_name)s::EAComp::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
Addr EA;
- Fault * fault = NoFault;
+ Fault fault = NoFault;
%(fp_enable_check)s;
%(op_decl)s;
@@ -230,12 +230,12 @@ def template EACompExecute {{
}};
def template LoadMemAccExecute {{
- Fault *
+ Fault
%(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
Addr EA;
- Fault * fault = NoFault;
+ Fault fault = NoFault;
%(fp_enable_check)s;
%(op_decl)s;
@@ -257,11 +257,11 @@ def template LoadMemAccExecute {{
def template LoadExecute {{
- Fault * %(class_name)s::execute(%(CPU_exec_context)s *xc,
+ Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
Addr EA;
- Fault * fault = NoFault;
+ Fault fault = NoFault;
%(fp_enable_check)s;
%(op_decl)s;
@@ -283,11 +283,11 @@ def template LoadExecute {{
def template LoadInitiateAcc {{
- Fault * %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc,
+ Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
Addr EA;
- Fault * fault = NoFault;
+ Fault fault = NoFault;
%(fp_enable_check)s;
%(op_src_decl)s;
@@ -304,11 +304,11 @@ def template LoadInitiateAcc {{
def template LoadCompleteAcc {{
- Fault * %(class_name)s::completeAcc(uint8_t *data,
+ Fault %(class_name)s::completeAcc(uint8_t *data,
%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
- Fault * fault = NoFault;
+ Fault fault = NoFault;
%(fp_enable_check)s;
%(op_src_decl)s;
@@ -330,12 +330,12 @@ def template LoadCompleteAcc {{
def template StoreMemAccExecute {{
- Fault *
+ Fault
%(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
Addr EA;
- Fault * fault = NoFault;
+ Fault fault = NoFault;
uint64_t write_result = 0;
%(fp_enable_check)s;
@@ -367,11 +367,11 @@ def template StoreMemAccExecute {{
def template StoreExecute {{
- Fault * %(class_name)s::execute(%(CPU_exec_context)s *xc,
+ Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
Addr EA;
- Fault * fault = NoFault;
+ Fault fault = NoFault;
uint64_t write_result = 0;
%(fp_enable_check)s;
@@ -402,11 +402,11 @@ def template StoreExecute {{
}};
def template StoreInitiateAcc {{
- Fault * %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc,
+ Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
Addr EA;
- Fault * fault = NoFault;
+ Fault fault = NoFault;
uint64_t write_result = 0;
%(fp_enable_check)s;
@@ -431,11 +431,11 @@ def template StoreInitiateAcc {{
def template StoreCompleteAcc {{
- Fault * %(class_name)s::completeAcc(uint8_t *data,
+ Fault %(class_name)s::completeAcc(uint8_t *data,
%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
- Fault * fault = NoFault;
+ Fault fault = NoFault;
uint64_t write_result = 0;
%(fp_enable_check)s;
@@ -457,11 +457,11 @@ def template StoreCompleteAcc {{
def template MiscMemAccExecute {{
- Fault * %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
+ Fault %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
Addr EA;
- Fault * fault = NoFault;
+ Fault fault = NoFault;
%(fp_enable_check)s;
%(op_decl)s;
@@ -477,11 +477,11 @@ def template MiscMemAccExecute {{
}};
def template MiscExecute {{
- Fault * %(class_name)s::execute(%(CPU_exec_context)s *xc,
+ Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
Addr EA;
- Fault * fault = NoFault;
+ Fault fault = NoFault;
%(fp_enable_check)s;
%(op_decl)s;
@@ -497,7 +497,7 @@ def template MiscExecute {{
}};
def template MiscInitiateAcc {{
- Fault * %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc,
+ Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
panic("Misc instruction does not support split access method!");
@@ -507,7 +507,7 @@ def template MiscInitiateAcc {{
def template MiscCompleteAcc {{
- Fault * %(class_name)s::completeAcc(uint8_t *data,
+ Fault %(class_name)s::completeAcc(uint8_t *data,
%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{