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author | Steve Reinhardt <stever@eecs.umich.edu> | 2006-02-09 23:02:38 -0500 |
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committer | Steve Reinhardt <stever@eecs.umich.edu> | 2006-02-09 23:02:38 -0500 |
commit | dd473ecd578a1bb21d2b6420f3944065a3539ffa (patch) | |
tree | 5ee60b5348d1e4347533541ee72af1616b3257be /arch/alpha/isa/unknown.isa | |
parent | fb90b1dd13fb6c0090bfe2731ca9ccee56479761 (diff) | |
download | gem5-dd473ecd578a1bb21d2b6420f3944065a3539ffa.tar.xz |
Split Alpha ISA description into multiple files
(thanks to Gabe's include feature!).
arch/alpha/isa/main.isa:
Split out into multiple .isa files.
--HG--
extra : convert_revision : 30d8edf74ea194d4a208febf1e66edc72a7dbd5d
Diffstat (limited to 'arch/alpha/isa/unknown.isa')
-rw-r--r-- | arch/alpha/isa/unknown.isa | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/alpha/isa/unknown.isa b/arch/alpha/isa/unknown.isa new file mode 100644 index 000000000..6eba5b4f9 --- /dev/null +++ b/arch/alpha/isa/unknown.isa @@ -0,0 +1,52 @@ +// -*- mode:c++ -*- + +// Copyright (c) 2003-2005 The Regents of The University of Michigan +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are +// met: redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer; +// redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution; +// neither the name of the copyright holders nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +output decoder {{ + std::string + Unknown::generateDisassembly(Addr pc, const SymbolTable *symtab) const + { + return csprintf("%-10s (inst 0x%x, opcode 0x%x)", + "unknown", machInst, OPCODE); + } +}}; + +output exec {{ + Fault + Unknown::execute(%(CPU_exec_context)s *xc, + Trace::InstRecord *traceData) const + { + panic("attempt to execute unknown instruction " + "(inst 0x%08x, opcode 0x%x)", machInst, OPCODE); + return Unimplemented_Opcode_Fault; + } +}}; + +def format Unknown() {{ + decode_block = 'return new Unknown(machInst);\n' +}}; + |