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author | Ali Saidi <saidi@eecs.umich.edu> | 2004-05-31 18:58:54 -0400 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2004-05-31 18:58:54 -0400 |
commit | 93983de0cfa06e58f1d448782269ebd33341ae83 (patch) | |
tree | 16d50228d138b5334f8cd1d3feffcfdd2c3adacf /arch/alpha/isa_traits.hh | |
parent | 9d0aa1399157bd90436409a7596377b4591a2d4a (diff) | |
parent | 6964ecd1cf14f294a300e91bc5b65042d03952d4 (diff) | |
download | gem5-93983de0cfa06e58f1d448782269ebd33341ae83.tar.xz |
Merged head into linux tree
base/stats/mysql.hh:
Rename of Statsistics namespace to stats... merge from head
--HG--
extra : convert_revision : a5a7f6268b35e75fba1b1800a74fcd6dbd09d974
Diffstat (limited to 'arch/alpha/isa_traits.hh')
-rw-r--r-- | arch/alpha/isa_traits.hh | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/alpha/isa_traits.hh b/arch/alpha/isa_traits.hh index 05ab89978..37ba77192 100644 --- a/arch/alpha/isa_traits.hh +++ b/arch/alpha/isa_traits.hh @@ -33,6 +33,7 @@ #include "targetarch/faults.hh" #include "base/misc.hh" +class FastCPU; class FullCPU; class Checkpoint; @@ -156,8 +157,6 @@ class AlphaISA int intrflag; // interrupt flag bool pal_shadow; // using pal_shadow registers #endif // FULL_SYSTEM - // Are these architectural, or just for convenience? - uint8_t opcode, ra; // current instruction details (for intr's) void serialize(std::ostream &os); void unserialize(Checkpoint *cp, const std::string §ion); @@ -233,6 +232,13 @@ class AlphaISA ConfigNode *node, RegFile ®s); #endif + + /** + * Function to insure ISA semantics about 0 registers. + * @param xc The execution context. + */ + template <class XC> + static void zeroRegisters(XC *xc); }; |