diff options
author | Kevin Lim <ktlim@umich.edu> | 2006-02-28 15:16:24 -0500 |
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committer | Kevin Lim <ktlim@umich.edu> | 2006-02-28 15:16:24 -0500 |
commit | 34da58a698e4119876f04d13c337e9974970f49a (patch) | |
tree | 6dc9940bf89b04ec973ff4b433a015e13cb7f017 /arch/alpha/stacktrace.cc | |
parent | 3a362d04b7aed0fa728af9373bad175a096a7de8 (diff) | |
parent | 96fd6b5c4039c98a1b536ec184126ad75e7d2539 (diff) | |
download | gem5-34da58a698e4119876f04d13c337e9974970f49a.tar.xz |
Merge ktlim@zizzer:/bk/m5
into zamp.eecs.umich.edu:/z/ktlim2/clean/m5-clean
arch/alpha/ev5.cc:
cpu/o3/regfile.hh:
Hand merge.
--HG--
rename : arch/alpha/alpha_memory.cc => arch/alpha/tlb.cc
extra : convert_revision : c941dd2198851398820b38a66471372ed8454891
Diffstat (limited to 'arch/alpha/stacktrace.cc')
-rw-r--r-- | arch/alpha/stacktrace.cc | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/alpha/stacktrace.cc b/arch/alpha/stacktrace.cc index 30ed07d9d..89b6b73a9 100644 --- a/arch/alpha/stacktrace.cc +++ b/arch/alpha/stacktrace.cc @@ -124,7 +124,7 @@ StackTrace::trace(ExecContext *_xc, bool is_call) { xc = _xc; - bool usermode = (xc->regs.ipr[AlphaISA::IPR_DTB_CM] & 0x18) != 0; + bool usermode = (xc->readMiscReg(AlphaISA::IPR_DTB_CM) & 0x18) != 0; Addr pc = xc->regs.npc; bool kernel = xc->system->kernelStart <= pc && pc <= xc->system->kernelEnd; @@ -196,22 +196,22 @@ StackTrace::trace(ExecContext *_xc, bool is_call) bool StackTrace::isEntry(Addr addr) { - if (addr == xc->regs.ipr[AlphaISA::IPR_PALtemp12]) + if (addr == xc->readMiscReg(AlphaISA::IPR_PALtemp12)) return true; - if (addr == xc->regs.ipr[AlphaISA::IPR_PALtemp7]) + if (addr == xc->readMiscReg(AlphaISA::IPR_PALtemp7)) return true; - if (addr == xc->regs.ipr[AlphaISA::IPR_PALtemp11]) + if (addr == xc->readMiscReg(AlphaISA::IPR_PALtemp11)) return true; - if (addr == xc->regs.ipr[AlphaISA::IPR_PALtemp21]) + if (addr == xc->readMiscReg(AlphaISA::IPR_PALtemp21)) return true; - if (addr == xc->regs.ipr[AlphaISA::IPR_PALtemp9]) + if (addr == xc->readMiscReg(AlphaISA::IPR_PALtemp9)) return true; - if (addr == xc->regs.ipr[AlphaISA::IPR_PALtemp2]) + if (addr == xc->readMiscReg(AlphaISA::IPR_PALtemp2)) return true; return false; |