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author | Ron Dreslinski <rdreslin@umich.edu> | 2006-04-07 15:54:48 -0400 |
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committer | Ron Dreslinski <rdreslin@umich.edu> | 2006-04-07 15:54:48 -0400 |
commit | 9e3d79694ca9e204bcbfa9c197db17b581dc7a29 (patch) | |
tree | b220b8a9bb0f1bfeff1c72cef2126c0af2a94a19 /arch/alpha/tlb.hh | |
parent | 62ebe251dac998202403bea45ba69345dc5bf42d (diff) | |
download | gem5-9e3d79694ca9e204bcbfa9c197db17b581dc7a29.tar.xz |
Move to a model with a unified request object.
Constructor takes a bool to signify that it is either a cpu_request or not a cpu_request.
When accedding variables of a cpu_request it asserts that it is a cpu_request.
It also asserts that a value being read has been written at some point in time prior (not gaurnteeing it is up to date, but it was at least written before read).
There is also a isCpuReq() function to determine if this is a cpu_request. It should be called before accesing a cpu_request only variable.
SConscript:
Add compilation support for request.cc
arch/alpha/tlb.cc:
arch/alpha/tlb.hh:
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
dev/io_device.cc:
mem/page_table.cc:
mem/page_table.hh:
mem/port.cc:
Update for unified request object and accessor functions.
mem/request.hh:
Remove CpuRequest, make it a unified object. Make variables private with accessor functions.
May want to move things from .cc file into header (usually a assert() and either returning a value, or writting two).
--HG--
extra : convert_revision : f1e45cc490dadc7a418634539b03c3e72684a6e3
Diffstat (limited to 'arch/alpha/tlb.hh')
-rw-r--r-- | arch/alpha/tlb.hh | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/alpha/tlb.hh b/arch/alpha/tlb.hh index 39faffbee..f6256020e 100644 --- a/arch/alpha/tlb.hh +++ b/arch/alpha/tlb.hh @@ -73,7 +73,7 @@ class AlphaTLB : public SimObject return (unimplBits == 0) || (unimplBits == EV5::VAddrUnImplMask); } - static Fault checkCacheability(CpuRequestPtr &req); + static Fault checkCacheability(RequestPtr &req); // Checkpointing virtual void serialize(std::ostream &os); @@ -92,7 +92,7 @@ class AlphaITB : public AlphaTLB AlphaITB(const std::string &name, int size); virtual void regStats(); - Fault translate(CpuRequestPtr &req, ExecContext *xc) const; + Fault translate(RequestPtr &req, ExecContext *xc) const; }; class AlphaDTB : public AlphaTLB @@ -115,7 +115,7 @@ class AlphaDTB : public AlphaTLB AlphaDTB(const std::string &name, int size); virtual void regStats(); - Fault translate(CpuRequestPtr &req, ExecContext *xc, bool write) const; + Fault translate(RequestPtr &req, ExecContext *xc, bool write) const; }; #endif // __ALPHA_MEMORY_HH__ |