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authorGabe Black <gblack@eecs.umich.edu>2006-03-09 15:15:55 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-03-09 15:15:55 -0500
commit91545ac2bf5ac47ecbfc403ef6e2b2ce340ae551 (patch)
treec01c598d48d60de1c4097d905430b44b9647e224 /arch/alpha
parent77e40756b723e6cf18462bbb15653792b5c90346 (diff)
parente30bce8f8e4fdb3dbf4f8161f496c94c85d3d8cf (diff)
downloadgem5-91545ac2bf5ac47ecbfc403ef6e2b2ce340ae551.tar.xz
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/m5/Bitkeeper/multiarch cpu/simple/cpu.cc: Hand Merge --HG-- rename : cpu/exec_context.hh => cpu/cpu_exec_context.hh extra : convert_revision : bf664b092f993d0f4675ce8e7df13645a920c1f4
Diffstat (limited to 'arch/alpha')
-rw-r--r--arch/alpha/isa_traits.hh2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/alpha/isa_traits.hh b/arch/alpha/isa_traits.hh
index 8e1f21a35..3cd6868b8 100644
--- a/arch/alpha/isa_traits.hh
+++ b/arch/alpha/isa_traits.hh
@@ -202,6 +202,8 @@ extern const int reg_redir[NumIntRegs];
MiscRegFile miscRegs; // control register file
Addr pc; // program counter
Addr npc; // next-cycle program counter
+ Addr nnpc;
+
#if FULL_SYSTEM
int intrflag; // interrupt flag
inline int instAsid()