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authorSteve Reinhardt <stever@eecs.umich.edu>2003-11-03 20:26:51 -0800
committerSteve Reinhardt <stever@eecs.umich.edu>2003-11-03 20:26:51 -0800
commit40b9a3878aed4e2400727ca87e1c9976cdecef58 (patch)
tree8c24cf73c21f2ff6ef3ce0d3df212071ebe77508 /arch/alpha
parentdc8370852f59f881a37161ea335573616dbd17b3 (diff)
downloadgem5-40b9a3878aed4e2400727ca87e1c9976cdecef58.tar.xz
Minor changes to instruction trace output.
arch/alpha/isa_desc: A few disassembly changes to make it easier to compare with old machine.def traces: - Make lds prefetches print f31 instead of r31 as dest. - Don't print mode suffixes on FP if SS_COMPATIBLE_DISASSEMBLY cpu/exetrace.cc: Left-justify instruction in field, and increase width by 1. --HG-- extra : convert_revision : 9ffd56728f1bb772aa3ccda5f027b93d4c3a4135
Diffstat (limited to 'arch/alpha')
-rw-r--r--arch/alpha/isa_desc20
1 files changed, 14 insertions, 6 deletions
diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc
index 75f765029..6c2888685 100644
--- a/arch/alpha/isa_desc
+++ b/arch/alpha/isa_desc
@@ -560,13 +560,19 @@ declare {{
{
std::string mnem_str(mnemonic);
- mnem_str += ((_destRegIdx[0] >= FP_Base_DepTag)
- ? fpTrappingModeSuffix[trappingMode]
- : intTrappingModeSuffix[trappingMode]);
- mnem_str += roundingModeSuffix[roundingMode];
+#ifndef SS_COMPATIBLE_DISASSEMBLY
+ std::string suffix("");
+ suffix += ((_destRegIdx[0] >= FP_Base_DepTag)
+ ? fpTrappingModeSuffix[trappingMode]
+ : intTrappingModeSuffix[trappingMode]);
+ suffix += roundingModeSuffix[roundingMode];
+
+ if (suffix != "") {
+ mnem_str = csprintf("%s/%s", mnemonic, suffix);
+ }
+#endif
std::stringstream ss;
-
ccprintf(ss, "%-10s ", mnem_str.c_str());
// just print the first two source regs... if there's
@@ -1790,8 +1796,10 @@ decode OPCODE default Unknown::unknown() {
format LoadOrPrefetch {
0x28: ldl({{ EA = Rb + disp; }}, {{ Ra.sl = Mem.sl; }});
0x29: ldq({{ EA = Rb + disp; }}, {{ Ra.uq = Mem.uq; }}, EVICT_NEXT);
+ // IsFloating flag on lds gets the prefetch to disassemble
+ // using f31 instead of r31... funcitonally it's unnecessary
0x22: lds({{ EA = Rb + disp; }}, {{ Fa.uq = s_to_t(Mem.ul); }},
- PF_EXCLUSIVE);
+ PF_EXCLUSIVE, IsFloating);
}
format Store {