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author | Ali Saidi <saidi@eecs.umich.edu> | 2006-03-09 16:17:10 -0500 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2006-03-09 16:17:10 -0500 |
commit | 7b283dbc090d1197593b00fd1279b92f7c2e693e (patch) | |
tree | b3e0badd1408f7dddcffbf1dbafbe52f70206f75 /arch/alpha | |
parent | 56cc760f6f53138c133c5d4e1f9d3e3199965d99 (diff) | |
download | gem5-7b283dbc090d1197593b00fd1279b92f7c2e693e.tar.xz |
fix merging issues
arch/alpha/isa_traits.hh:
arch/sparc/linux/process.cc:
fix merging problem
sim/syscall_emul.cc:
use setIntReg
--HG--
extra : convert_revision : e88d72e415493cd17d7b88c22c7e995f3199e396
Diffstat (limited to 'arch/alpha')
-rw-r--r-- | arch/alpha/isa_traits.hh | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/alpha/isa_traits.hh b/arch/alpha/isa_traits.hh index 6f6b11e62..0cf31cb50 100644 --- a/arch/alpha/isa_traits.hh +++ b/arch/alpha/isa_traits.hh @@ -125,6 +125,7 @@ namespace AlphaISA const int ArgumentReg5 = 21; const int SyscallNumReg = ReturnValueReg; const int SyscallPseudoReturnReg = ArgumentReg4; + const int SyscallSuccessReg = 19; @@ -341,6 +342,8 @@ extern const int reg_redir[NumIntRegs]; template <class XC> void zeroRegisters(XC *xc); + const Addr MaxAddr = (Addr)-1; + static inline void setSyscallReturn(SyscallReturn return_value, RegFile *regs) { // check for error condition. Alpha syscall convention is to @@ -356,6 +359,7 @@ extern const int reg_redir[NumIntRegs]; regs->intRegFile[ReturnValueReg] = -return_value.value(); } } +}; static inline AlphaISA::ExtMachInst AlphaISA::makeExtMI(AlphaISA::MachInst inst, const uint64_t &pc) { |