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authorNathan Binkert <binkertn@umich.edu>2004-03-24 02:59:43 -0500
committerNathan Binkert <binkertn@umich.edu>2004-03-24 02:59:43 -0500
commit832a0917cf28d09520c1d2ac60921c4e034f7c26 (patch)
tree2c33bead39d0ae23097908d991888ac380c15115 /arch/alpha
parentb18a36a6f2034db838d3a8013a460b7f59c802a4 (diff)
downloadgem5-832a0917cf28d09520c1d2ac60921c4e034f7c26.tar.xz
ULL()
--HG-- extra : convert_revision : 543313ec248457e6cb2f8315881f030545e8cf45
Diffstat (limited to 'arch/alpha')
-rw-r--r--arch/alpha/alpha_memory.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc
index 2f0dcfecf..d1b152f73 100644
--- a/arch/alpha/alpha_memory.cc
+++ b/arch/alpha/alpha_memory.cc
@@ -92,7 +92,7 @@ AlphaTlb::checkCacheability(MemReqPtr &req)
// IPR memory space not implemented
if (!req->xc->misspeculating()) {
switch (req->paddr) {
- case 0xFFFFF00188:
+ case ULL(0xFFFFF00188):
req->data = 0;
break;