diff options
author | Ali Saidi <saidi@eecs.umich.edu> | 2004-08-02 17:16:54 -0400 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2004-08-02 17:16:54 -0400 |
commit | 8f19fd2cbef2680a186bc101437b69514ad0bc1c (patch) | |
tree | b2b610aeed7d20cfba05ba2acfbd3eae5f48be76 /arch/alpha | |
parent | e79dee27ce744458449b4aec9e39f297aa01d984 (diff) | |
parent | 6c954de33ea598dfd356f315b3cea620acc3b8b7 (diff) | |
download | gem5-8f19fd2cbef2680a186bc101437b69514ad0bc1c.tar.xz |
merged full_cpu.ini, system.ini and devtime.c
util/ccdrv/devtime.c:
coding style
--HG--
extra : convert_revision : 972941e100ba13a2ece0986454c4a3485841d9cb
Diffstat (limited to 'arch/alpha')
-rw-r--r-- | arch/alpha/alpha_memory.cc | 8 | ||||
-rw-r--r-- | arch/alpha/isa_desc | 13 | ||||
-rw-r--r-- | arch/alpha/pseudo_inst.cc | 16 | ||||
-rw-r--r-- | arch/alpha/pseudo_inst.hh | 2 |
4 files changed, 38 insertions, 1 deletions
diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc index 5d9a5fc6f..9f5ab185e 100644 --- a/arch/alpha/alpha_memory.cc +++ b/arch/alpha/alpha_memory.cc @@ -491,6 +491,14 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const AlphaISA::mode_type mode = (AlphaISA::mode_type)DTB_CM_CM(ipr[AlphaISA::IPR_DTB_CM]); + + /* @todo this should actually be in there but for whatever reason + * Its not working at present. + */ + if (req->vaddr & (req->size - 1)) { + return Alignment_Fault; + } + if (PC_PAL(pc)) { mode = (req->flags & ALTMODE) ? (AlphaISA::mode_type)ALT_MODE_AM(ipr[AlphaISA::IPR_ALT_MODE]) diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index fa24e5215..d6b99a8ae 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -2400,7 +2400,11 @@ decode OPCODE default Unknown::unknown() { format BasicOperate { 0xc000: rpcc({{ #ifdef FULL_SYSTEM - Ra = xc->readIpr(AlphaISA::IPR_CC, fault); + /* Rb is a fake dependency so here is a fun way to get + * the parser to understand that. + */ + Ra = xc->readIpr(AlphaISA::IPR_CC, fault) + (Rb & 0); + #else Ra = curTick; #endif @@ -2543,6 +2547,13 @@ decode OPCODE default Unknown::unknown() { 0x50: m5readfile({{ AlphaPseudo::readfile(xc->xcBase()); }}, IsNonSpeculative); + 0x51: m5break({{ + AlphaPseudo::debugbreak(xc->xcBase()); + }}, IsNonSpeculative); + 0x52: m5switchcpu({{ + AlphaPseudo::switchcpu(xc->xcBase()); + }}, IsNonSpeculative); + } } diff --git a/arch/alpha/pseudo_inst.cc b/arch/alpha/pseudo_inst.cc index 370266909..fd6742801 100644 --- a/arch/alpha/pseudo_inst.cc +++ b/arch/alpha/pseudo_inst.cc @@ -35,6 +35,7 @@ #include "arch/alpha/pseudo_inst.hh" #include "arch/alpha/vtophys.hh" #include "cpu/base_cpu.hh" +#include "cpu/sampling_cpu/sampling_cpu.hh" #include "cpu/exec_context.hh" #include "sim/param.hh" #include "sim/serialize.hh" @@ -42,8 +43,12 @@ #include "sim/stat_control.hh" #include "sim/stats.hh" #include "sim/system.hh" +#include "sim/debug.hh" using namespace std; + +extern SamplingCPU *SampCPU; + using namespace Stats; namespace AlphaPseudo @@ -219,4 +224,15 @@ namespace AlphaPseudo doStatisticsInsts = __statistics; doCheckpointInsts = __checkpoint; } + + void debugbreak(ExecContext *xc) + { + debug_break(); + } + + void switchcpu(ExecContext *xc) + { + if (SampCPU) + SampCPU->switchCPUs(); + } } diff --git a/arch/alpha/pseudo_inst.hh b/arch/alpha/pseudo_inst.hh index 22e5d43ae..46347ad69 100644 --- a/arch/alpha/pseudo_inst.hh +++ b/arch/alpha/pseudo_inst.hh @@ -48,4 +48,6 @@ namespace AlphaPseudo void dumpresetstats(ExecContext *xc); void m5checkpoint(ExecContext *xc); void readfile(ExecContext *xc); + void debugbreak(ExecContext *xc); + void switchcpu(ExecContext *xc); } |