Redo the FloatRegFile using unsigned integers

Edit the convert_and_round function which access FloatRegFile

arch/isa_parser.py:
    recognize when we are writing a 'uint64_t' FloatReg and set the width appropriately
arch/mips/isa/decoder.isa:
    Send a 'float' to the convert function instead of a unsigned word. Do this so we dont have to worry about the
    bit manipulation ourselves. We can just concern ourselves with values.

    Use unsigned double to get movd...
arch/mips/isa/formats/fp.isa:
    float debug statement
arch/mips/isa_traits.cc:
    add different versions of convert_and_round functions
arch/mips/isa_traits.hh:
    Use an array of uint32_t unsigned integers to represent the Floating Point Regfile
configs/test/hello_mips:
    basic FP program
cpu/simple/cpu.hh:
    spacing

--HG--
extra : convert_revision : a6fca91ad6365c83025f1131d71fa1b8ee76d7bc

1 files changed, 3 insertions, 0 deletions

diff --git a/arch/isa_parser.py b/arch/isa_parser.py
index 921a6fa82..83620a9f1 100755
--- a/arch/isa_parser.py
+++ b/arch/isa_parser.py
@@ -1251,6 +1251,9 @@ class FloatRegOperand(Operand):
         elif (self.ctype == 'double'):
             width = 64
             func = 'setFloatReg'
+        elif (self.ctype == 'uint64_t'):
+            func = 'setFloatRegBits'
+            width = 64
         else:
             func = 'setFloatRegBits'
             final_ctype = 'uint%d_t' % self.dflt_size