recognized 32 & 64 bit unsigned integer types and set the width appropriately

arch/mips/isa_traits.hh:
    debug statements to be taken out real soon like...

--HG--
extra : convert_revision : 4e9abcb99c991db93328d01d7606a2bb942b29ee

1 files changed, 7 insertions, 0 deletions

diff --git a/arch/isa_parser.py b/arch/isa_parser.py
index 83620a9f1..a92c85c3f 100755
--- a/arch/isa_parser.py
+++ b/arch/isa_parser.py
@@ -1226,6 +1226,10 @@ class FloatRegOperand(Operand):
             width = 64;
         else:
             func = 'readFloatRegBits'
+            if (self.ctype == 'uint32_t'):
+                width = 32;
+            elif (self.ctype == 'uint64_t'):
+                width = 64;
             if (self.size != self.dflt_size):
                 bit_select = 1
         if width:
@@ -1251,6 +1255,9 @@ class FloatRegOperand(Operand):
         elif (self.ctype == 'double'):
             width = 64
             func = 'setFloatReg'
+        elif (self.ctype == 'uint32_t'):
+            func = 'setFloatRegBits'
+            width = 32
         elif (self.ctype == 'uint64_t'):
             func = 'setFloatRegBits'
             width = 64