support for unaligned memory access

arch/mips/isa/base.isa:
    disassembly fixes
arch/mips/isa/decoder.isa:
    support for unaligned loads/stores
arch/mips/isa_traits.hh:
    edit Syscall Reg values
arch/mips/linux_process.cc:
    call writevFunc on writev syscall

--HG--
extra : convert_revision : 4aea6d069bd7ba0e83b23d2d85c50d68532f0454

1 files changed, 3 insertions, 4 deletions

diff --git a/arch/mips/isa/base.isa b/arch/mips/isa/base.isa
index 89837c136..139a6d876 100644
--- a/arch/mips/isa/base.isa
+++ b/arch/mips/isa/base.isa
@@ -67,12 +67,11 @@ output decoder {{
         ccprintf(ss, "%-10s ", mnemonic);
 
         if(_numDestRegs > 0){
-            if(_numSrcRegs > 0)
-                ss << ",";
             printReg(ss, _destRegIdx[0]);
         }
 
         if(_numSrcRegs > 0) {
+            ss << ",";
             printReg(ss, _srcRegIdx[0]);
         }
 
@@ -82,8 +81,8 @@ output decoder {{
         }
 
 
-        if(mnemonic == "sll"){
-            ccprintf(ss," %d",SA);
+        if(mnemonic == "sll" || mnemonic == "sra"){
+            ccprintf(ss,", %d",SA);
         }
 
         return ss.str();