MIPS generates ISA code through scons '.../decoder.cc'!!!

Now, must create g++ compilable code ...

arch/mips/isa/decoder.isa:
    missing a '}' ... edited a few instruction decodings ...
arch/mips/isa/formats.isa:
    rearranged #include
arch/mips/isa/formats/branch.isa:
    add Branch Likely  and Unconditional format
arch/mips/isa/formats/int.isa:
    move OperateNopCheckDecode template to another file ...
arch/mips/isa/formats/noop.isa:
    change Alpha to Mips in noop.isa

--HG--
extra : convert_revision : 4bf955fa6dffbbc99fb95fee7878f691e3df5424

1 files changed, 24 insertions, 17 deletions

diff --git a/arch/mips/isa/formats/branch.isa b/arch/mips/isa/formats/branch.isa
index c7c97c2c8..75e7830d0 100644
--- a/arch/mips/isa/formats/branch.isa
+++ b/arch/mips/isa/formats/branch.isa
@@ -61,8 +61,7 @@ output header {{
     };
 
     /**
-     * Base class for branches (PC-relative control transfers),
-     * conditional or unconditional.
+     * Base class for branch likely branches (PC-relative control transfers),
      */
     class BranchLikely : public PCDependentDisassembly
     {
@@ -206,14 +205,21 @@ output decoder {{
     }
 }};
 
+
 def template JumpOrBranchDecode {{
     return (RD == 0)
         ? (StaticInst<MipsISA> *)new %(class_name)s(machInst)
         : (StaticInst<MipsISA> *)new %(class_name)sAndLink(machInst);
 }};
 
-def format Branch(code) {{
-    code = 'bool cond;\n' + code + '\nif (cond) NPC = NPC + disp;\n';
+def format Branch(code,*flags) {{
+    code = 'bool cond;\n' + code + '\n'
+
+    if flags == 'IsLink':
+        code += 'R31 = NPC + 8\n'
+
+    code += '\nif (cond) NPC = NPC + disp;\n';
+
     iop = InstObjParams(name, Name, 'Branch', CodeBlock(code),
                         ('IsDirectControl', 'IsCondControl'))
     header_output = BasicDeclare.subst(iop)
@@ -222,28 +228,29 @@ def format Branch(code) {{
     exec_output = BasicExecute.subst(iop)
 }};
 
-
-def format BranchLikely(code) {{
+def format BranchLikely(code,*flags) {{
     code = 'bool cond;\n' + code + '\nif (cond) NPC = NPC + disp;\n';
+
+    if flags == 'IsLink':
+        code += 'R31 = NPC + 8\n'
+
     iop = InstObjParams(name, Name, 'Branch', CodeBlock(code),
-                        ('IsDirectControl', 'IsCondControl'))
+                        ('IsDirectControl', 'IsCondControl','IsCondDelaySlot'))
     header_output = BasicDeclare.subst(iop)
     decoder_output = BasicConstructor.subst(iop)
     decode_block = BasicDecode.subst(iop)
     exec_output = BasicExecute.subst(iop)
 }};
 
-
-def format UncondBranch(*flags) {{
-    flags += ('IsUncondControl', 'IsDirectControl')
-    (header_output, decoder_output, decode_block, exec_output) = \
-        UncondCtrlBase(name, Name, 'Branch', 'NPC + disp', flags)
+def format Unconditional(code,*flags) {{
+    iop = InstObjParams(name, Name, 'Jump', CodeBlock(code),
+                        ('IsIndirectControl', 'IsUncondControl'))
+    header_output = BasicDeclare.subst(iop)
+    decoder_output = BasicConstructor.subst(iop)
+    decode_block = BasicDecode.subst(iop)
+    exec_output = BasicExecute.subst(iop)
 }};
 
-def format Jump(*flags) {{
-    flags += ('IsUncondControl', 'IsIndirectControl')
-    (header_output, decoder_output, decode_block, exec_output) = \
-        UncondCtrlBase(name, Name, 'Jump', '(Rb & ~3) | (NPC & 1)', flags)
-}};
+