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author | Gabe Black <gblack@eecs.umich.edu> | 2006-03-08 08:09:45 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-03-08 08:09:45 -0500 |
commit | 0df85fd8d8b7a8c8d11b1b3da5b6277e4a5e54ec (patch) | |
tree | 0764ab44f5764b2699a96ada545a5875d4cdb59e /arch/mips/isa/formats/int.isa | |
parent | 3b7d756907c8dd0f7c6387953f7b156330fcc47d (diff) | |
parent | bfd820f704cd67519be276967c659d025bc502d1 (diff) | |
download | gem5-0df85fd8d8b7a8c8d11b1b3da5b6277e4a5e54ec.tar.xz |
Merge gblack@m5.eecs.umich.edu:/bk/multiarch
into ewok.(none):/home/gblack/m5/multiarch
--HG--
extra : convert_revision : 5fe5a3d70774d6420b890237d9be4a5d0f00d17e
Diffstat (limited to 'arch/mips/isa/formats/int.isa')
-rw-r--r-- | arch/mips/isa/formats/int.isa | 63 |
1 files changed, 59 insertions, 4 deletions
diff --git a/arch/mips/isa/formats/int.isa b/arch/mips/isa/formats/int.isa index cf06741a1..a47844bee 100644 --- a/arch/mips/isa/formats/int.isa +++ b/arch/mips/isa/formats/int.isa @@ -7,6 +7,8 @@ //Outputs to decoder.hh output header {{ +#include <iostream> + using namespace std; /** * Base class for integer operations. */ @@ -26,15 +28,24 @@ output header {{ class IntImmOp : public MipsStaticInst { protected: - uint16_t imm; + + int32_t imm; /// Constructor IntImmOp(const char *mnem, MachInst _machInst, OpClass __opClass) : MipsStaticInst(mnem, _machInst, __opClass),imm(INTIMM) { + //If Bit 15 is 1 then Sign Extend + int32_t temp = imm & 0x00008000; + + if (temp > 0 && mnemonic != "lui") { + imm |= 0xFFFF0000; + } } std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; + + }; }}; @@ -43,15 +54,59 @@ output header {{ output decoder {{ std::string IntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { - return "Disassembly of integer instruction\n"; + std::stringstream ss; + + ccprintf(ss, "%-10s ", mnemonic); + + // just print the first dest... if there's a second one, + // it's generally implicit + if (_numDestRegs > 0) { + printReg(ss, _destRegIdx[0]); + } + + ss << ","; + + // just print the first two source regs... if there's + // a third one, it's a read-modify-write dest (Rc), + // e.g. for CMOVxx + if (_numSrcRegs > 0) { + printReg(ss, _srcRegIdx[0]); + } + + if (_numSrcRegs > 1) { + ss << ","; + printReg(ss, _srcRegIdx[1]); + } + + return ss.str(); } std::string IntImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { - return "Disassembly of integer immediate instruction\n"; + std::stringstream ss; + + ccprintf(ss, "%-10s ", mnemonic); + + if (_numDestRegs > 0) { + printReg(ss, _destRegIdx[0]); + } + + ss << ","; + + if (_numSrcRegs > 0) { + printReg(ss, _srcRegIdx[0]); + ss << ","; + } + + if( mnemonic == "lui") + ccprintf(ss, "%08p ", imm); + else + ss << (int) imm; + + return ss.str(); } -}}; +}}; //Used by decoder.isa def format IntOp(code, *opt_flags) {{ |