Finally MIPS does hello world!

arch/mips/isa/bitfields.isa:
    add RS_SRL bitfield ...these must be set to 0 for a SRL instruction
arch/mips/isa/decoder.isa:
    Make unimplemented instructions Fail instead of just Warn
    Edits to SRA & SRAV instructions
    Implement CFC1 instructions
    Unaligned Memory Access Support (Maybe Not fully functional yet)
    Enforce a more strict decode policy (in terms of different bitfields set to 0 on certain instructions)
arch/mips/isa/formats/branch.isa:
    Fix disassembly
arch/mips/isa/formats/int.isa:
    Add sign extend Immediate and zero extend Immediate to Int class.
    Probably a bit unnecessary in the long run since these manipulations could
    be done in the actually instruction instead of keep a int value
arch/mips/isa/formats/mem.isa:
    Comment/Remove out split-memory access code... revisit this after SimpleCPU works
arch/mips/isa/formats/unimp.isa:
    Add inst2string function to Unimplemented panic. PRints out the instruction
    binary to help in debuggin
arch/mips/isa/formats/unknown.isa:
    define inst2string function , use in unknown disassembly and panic function
arch/mips/isa/operands.isa:
    Make "Mem" default to a unsigned word since this is MIPS32
arch/mips/isa_traits.hh:
    change return values to 32 instead of 64
arch/mips/linux_process.cc:
    assign some syscalls to the right functions
cpu/static_inst.hh:
    more debug functions for MIPS (these will be move to the mips directory soon)
mem/page_table.cc:
mem/page_table.hh:
    toward a better implementation for unaligned memory access
mem/request.hh:
    NO ALIGN FAULT flag added to support unaligned memory access
sim/syscall_emul.cc:
    additional SyscallVerbose comments

--HG--
extra : convert_revision : 1987d80c9f4ede507f1f0148435e0bee97d2428c

1 files changed, 9 insertions, 7 deletions

diff --git a/arch/mips/isa/formats/int.isa b/arch/mips/isa/formats/int.isa
index a47844bee..98e58f7f2 100644
--- a/arch/mips/isa/formats/int.isa
+++ b/arch/mips/isa/formats/int.isa
@@ -29,17 +29,19 @@ output header {{
         {
                 protected:
 
-                int32_t imm;
+                int16_t imm;
+                int32_t sextImm;
+                uint32_t zextImm;
 
                 /// Constructor
                 IntImmOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
-                                MipsStaticInst(mnem, _machInst, __opClass),imm(INTIMM)
+                    MipsStaticInst(mnem, _machInst, __opClass),imm(INTIMM),
+                    sextImm(INTIMM),zextImm(0x0000FFFF & INTIMM)
                 {
                     //If Bit 15 is 1 then Sign Extend
-                    int32_t temp = imm & 0x00008000;
-
+                    int32_t temp = sextImm & 0x00008000;
                     if (temp > 0 && mnemonic != "lui") {
-                        imm |= 0xFFFF0000;
+                        sextImm |= 0xFFFF0000;
                     }
                 }
 
@@ -99,9 +101,9 @@ output decoder {{
             }
 
             if( mnemonic == "lui")
-                ccprintf(ss, "%08p ", imm);
+                ccprintf(ss, "%08p ", sextImm);
             else
-                ss << (int) imm;
+                ss << (int) sextImm;
 
             return ss.str();
         }