diff options
author | Korey Sewell <ksewell@umich.edu> | 2006-02-08 14:50:07 -0500 |
---|---|---|
committer | Korey Sewell <ksewell@umich.edu> | 2006-02-08 14:50:07 -0500 |
commit | b203d7bd33fd4552c556cf3cea7007d717d04375 (patch) | |
tree | 9bee107d332bcb4cb0b447485e25ab128fdb953d /arch/mips/isa/formats/mem.isa | |
parent | 29bc6c086af827be7acaba7b4576a33239b7e930 (diff) | |
download | gem5-b203d7bd33fd4552c556cf3cea7007d717d04375.tar.xz |
add at least BasicOp Format to most if not all instructions
and file name changes ...
arch/mips/isa/decoder.isa:
add at least BasicOp Format to most if not all instructions
--HG--
rename : arch/mips/isa/formats/basic.format => arch/mips/isa/formats/basic.isa
rename : arch/mips/isa/formats/branch.format => arch/mips/isa/formats/branch.isa
rename : arch/mips/isa/formats/fp.format => arch/mips/isa/formats/fp.isa
rename : arch/mips/isa/formats/int.format => arch/mips/isa/formats/int.isa
rename : arch/mips/isa/formats/mem.format => arch/mips/isa/formats/mem.isa
rename : arch/mips/isa/formats/noop.format => arch/mips/isa/formats/noop.isa
rename : arch/mips/isa/formats/tlbop.format => arch/mips/isa/formats/tlbop.isa
rename : arch/mips/isa/formats/trap.format => arch/mips/isa/formats/trap.isa
rename : arch/mips/isa/mips.isa => arch/mips/isa/main.isa
extra : convert_revision : 0b2f3aee13fee3e0e25c0c746af4216c4a596391
Diffstat (limited to 'arch/mips/isa/formats/mem.isa')
-rw-r--r-- | arch/mips/isa/formats/mem.isa | 78 |
1 files changed, 78 insertions, 0 deletions
diff --git a/arch/mips/isa/formats/mem.isa b/arch/mips/isa/formats/mem.isa new file mode 100644 index 000000000..5ed5237c5 --- /dev/null +++ b/arch/mips/isa/formats/mem.isa @@ -0,0 +1,78 @@ +//////////////////////////////////////////////////////////////////// +// +// Mem instructions +// + +output header {{ + /** + * Base class for integer operations. + */ + class Mem : public MipsStaticInst + { + protected: + + /// Constructor + Mem(const char *mnem, MachInst _machInst, OpClass __opClass) : MipsStaticInst(mnem, _machInst, __opClass) + { + } + + std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; + }; +}}; + +output decoder {{ + std::string Mem::generateDisassembly(Addr pc, const SymbolTable *symtab) const + { + return "Disassembly of integer instruction\n"; + } +}}; + +def template MemExecute {{ + Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const + { + //Attempt to execute the instruction + try + { + + %(op_decl)s; + %(op_rd)s; + ea_code + %(code)s; + } + //If we have an exception for some reason, + //deal with it + catch(MipsException except) + { + //Deal with exception + return No_Fault; + } + + //Write the resulting state to the execution context + %(op_wb)s; + + return No_Fault; + } +}}; + +// Primary format for integer operate instructions: +def format Mem(code, *opt_flags) {{ + orig_code = code + cblk = CodeBlock(code) + iop = InstObjParams(name, Name, 'MipsStaticInst', cblk, opt_flags) + header_output = BasicDeclare.subst(iop) + decoder_output = BasicConstructor.subst(iop) + decode_block = BasicDecodeWithMnemonic.subst(iop) + exec_output = MemExecute.subst(iop) + exec_output.replace('ea_code', 'EA = I ? (R1 + SIMM13) : R1 + R2;'); +}}; + +def format Cas(code, *opt_flags) {{ + orig_code = code + cblk = CodeBlock(code) + iop = InstObjParams(name, Name, 'MipsStaticInst', cblk, opt_flags) + header_output = BasicDeclare.subst(iop) + decoder_output = BasicConstructor.subst(iop) + decode_block = BasicDecodeWithMnemonic.subst(iop) + exec_output = MemExecute.subst(iop) + exec_output.replace('ea_code', 'EA = R1;'); +}}; |