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author | Korey Sewell <ksewell@umich.edu> | 2006-02-14 22:43:14 -0500 |
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committer | Korey Sewell <ksewell@umich.edu> | 2006-02-14 22:43:14 -0500 |
commit | 23bbec6a3445b4382f8c6ff8ea49fd818f960330 (patch) | |
tree | 2f3055f8f5eb7af6fbde0572877d4dc79fa4d51b /arch/mips/isa/operands.isa | |
parent | 5830200d78afa4d50f672b67fc7db80c78e3a2ad (diff) | |
download | gem5-23bbec6a3445b4382f8c6ff8ea49fd818f960330.tar.xz |
another big step to a parsable ISA ... no errors after I used a symbolic link for
arch/alpha/main.isa to test my files ...
arch/mips/isa/operands.isa:
use sd and ud instead of sdw and udw
--HG--
extra : convert_revision : d66f3fd2c4a4d70e6015f0f1643c400cdfe73055
Diffstat (limited to 'arch/mips/isa/operands.isa')
-rw-r--r-- | arch/mips/isa/operands.isa | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/isa/operands.isa b/arch/mips/isa/operands.isa index c8e08a436..cf6f10e0b 100644 --- a/arch/mips/isa/operands.isa +++ b/arch/mips/isa/operands.isa @@ -5,8 +5,8 @@ def operand_types {{ 'uhw' : ('unsigned int', 16), 'sw' : ('signed int', 32), 'uw' : ('unsigned int', 32), - 'sdw' : ('signed int', 64), - 'udw' : ('unsigned int', 64), + 'sd' : ('signed int', 64), + 'ud' : ('unsigned int', 64), 'sf' : ('float', 32), 'df' : ('float', 64), 'qf' : ('float', 128) @@ -24,7 +24,7 @@ def operands {{ 'Fs': ('FloatReg', 'sf', 'FS', 'IsFloating', 2), 'Ft': ('FloatReg', 'sf', 'FT', 'IsFloating', 3), - 'Mem': ('Mem', 'udw', None, ('IsMemRef', 'IsLoad', 'IsStore'), 4) + 'Mem': ('Mem', 'ud', None, ('IsMemRef', 'IsLoad', 'IsStore'), 4) #'NPC': ('NPC', 'uq', None, ( None, None, 'IsControl' ), 4), #'Runiq': ('ControlReg', 'uq', 'Uniq', None, 1), |