Hand merge. Stuff probably doesn't compile.

--HG--
rename : arch/alpha/isa_desc => arch/alpha/isa/main.isa
rename : arch/alpha/alpha_linux_process.cc => arch/alpha/linux/process.cc
rename : arch/alpha/alpha_linux_process.hh => arch/alpha/linux/process.hh
rename : arch/alpha/alpha_tru64_process.cc => arch/alpha/tru64/process.cc
rename : arch/alpha/alpha_tru64_process.hh => arch/alpha/tru64/process.hh
rename : cpu/exec_context.cc => cpu/cpu_exec_context.cc
rename : cpu/exec_context.hh => cpu/cpu_exec_context.hh
extra : convert_revision : 7d1efcedd708815d985a951f6f010fbd83dc27e8

1 files changed, 33 insertions, 0 deletions

diff --git a/arch/mips/isa/operands.isa b/arch/mips/isa/operands.isa
new file mode 100644
index 000000000..13870337b
--- /dev/null
+++ b/arch/mips/isa/operands.isa
@@ -0,0 +1,33 @@
+def operand_types {{
+    'sb' : ('signed int', 8),
+    'ub' : ('unsigned int', 8),
+    'sh' : ('signed int', 16),
+    'uh' : ('unsigned int', 16),
+    'sw' : ('signed int', 32),
+    'uw' : ('unsigned int', 32),
+    'sd' : ('signed int', 64),
+    'ud' : ('unsigned int', 64),
+    'sf' : ('float', 32),
+    'df' : ('float', 64),
+    'qf' : ('float', 128)
+}};
+
+def operands {{
+    'Rd': ('IntReg', 'uw', 'RD', 'IsInteger', 1),
+    'Rs': ('IntReg', 'uw', 'RS', 'IsInteger', 2),
+    'Rt': ('IntReg', 'uw', 'RT', 'IsInteger', 3),
+    'r31': ('IntReg', 'uw','R31','IsInteger', 4),
+    'R0':  ('IntReg', 'uw','R0', 'IsInteger', 5),
+
+    'IntImm': ('IntReg', 'uw', 'INTIMM', 'IsInteger', 3),
+
+    'Fd': ('FloatReg', 'sf', 'FD', 'IsFloating', 1),
+    'Fs': ('FloatReg', 'sf', 'FS', 'IsFloating', 2),
+    'Ft': ('FloatReg', 'sf', 'FT', 'IsFloating', 3),
+    'Fr': ('FloatReg', 'sf', 'FR', 'IsFloating', 3),
+
+    'Mem': ('Mem', 'ud', None, ('IsMemRef', 'IsLoad', 'IsStore'), 4),
+
+    'NPC': ('NPC', 'uw', None, ( None, None, 'IsControl' ), 4),
+    'NNPC':('NNPC', 'uw', None, ( None, None, 'IsControl' ), 4)
+}};