Use lower two bits of FCSR reg to determine rounding mode (may want to move this out of decoder.isa and into a template)

Have FP conversion instructions use re-defined convert_and_round() function

arch/mips/isa/decoder.isa:
    Use lower two bits of FCSR reg to determine rounding mode (may want to move this out of decoder.isa and into a template)
    Have FP conversion instructions to use re-defined convert_and_round() function
arch/mips/isa/formats/util.isa:
    Remove convert_and_round function from here
arch/mips/isa_traits.cc:
    Define convert_and_round function here
arch/mips/isa_traits.hh:
    Use "enums" to define FP conversion types & Round Modes
    Declare convert_and_round function here

--HG--
extra : convert_revision : 0f4f8c1732a53b277361559ea71af2a1feb4fc64

1 files changed, 31 insertions, 0 deletions

diff --git a/arch/mips/isa_traits.cc b/arch/mips/isa_traits.cc
index c6cfb2a0f..d23cdf367 100644
--- a/arch/mips/isa_traits.cc
+++ b/arch/mips/isa_traits.cc
@@ -33,7 +33,38 @@
 
 using namespace MipsISA;
 
+uint64_t
+MipsISA::convert_and_round(uint64_t fp_val, ConvertType cvt_type, int rnd_mode)
+{
+    uint64_t ret_val = 0;
+
+    switch (cvt_type)
+    {
+      case SINGLE_TO_DOUBLE:
+        break;
+
+      case SINGLE_TO_WORD:
+        break;
+
+      case SINGLE_TO_LONG:
+        break;
+
+      case DOUBLE_TO_SINGLE:
 
+        break;
+
+      case LONG_TO_SINGLE:
+        break;
+
+      case WORD_TO_SINGLE:
+        break;
+
+      default:
+        panic("Invalid Floating Point Conversion type being used.\n");
+    }
+
+    return ret_val;
+}
 
 void
 MipsISA::copyRegs(ExecContext *src, ExecContext *dest)