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author | Korey Sewell <ksewell@umich.edu> | 2006-02-21 22:02:05 -0500 |
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committer | Korey Sewell <ksewell@umich.edu> | 2006-02-21 22:02:05 -0500 |
commit | a4799a89ded3b2ebddd682dbcb0f8d2dd968b68a (patch) | |
tree | 6464529eceafa3ed8e6b30e19e3e0cb216dc9113 /arch/mips/isa_traits.cc | |
parent | 3f7979c99d8dc4f434e3daa2e179616f1669e16e (diff) | |
download | gem5-a4799a89ded3b2ebddd682dbcb0f8d2dd968b68a.tar.xz |
Renaming alpha files and changing some MIPS stuff to be more like Alpha version
SConscript:
changed the alpha_memory.hh to memory.hh in SConscript
arch/isa_parser.py:
temporarily comment out o3 model
arch/mips/isa/base.isa:
arch/mips/isa_traits.cc:
arch/mips/isa_traits.hh:
Fix Up Base Class to mirror how Alpha generates StaticInsts
arch/mips/faults.cc:
MIPS fault.cc file
arch/mips/faults.hh:
MIPS fault.hh file
--HG--
rename : arch/alpha/alpha_linux_process.cc => arch/alpha/linux_process.cc
rename : arch/alpha/alpha_linux_process.hh => arch/alpha/linux_process.hh
rename : arch/alpha/alpha_memory.cc => arch/alpha/memory.cc
rename : arch/alpha/alpha_memory.hh => arch/alpha/memory.hh
rename : arch/alpha/alpha_tru64_process.cc => arch/alpha/tru64_process.cc
rename : arch/alpha/alpha_tru64_process.hh => arch/alpha/tru64_process.hh
extra : convert_revision : f92d6e765ca96a8b952aef79ed119fa29464563b
Diffstat (limited to 'arch/mips/isa_traits.cc')
-rw-r--r-- | arch/mips/isa_traits.cc | 109 |
1 files changed, 99 insertions, 10 deletions
diff --git a/arch/mips/isa_traits.cc b/arch/mips/isa_traits.cc index 90a85feb6..02a857af7 100644 --- a/arch/mips/isa_traits.cc +++ b/arch/mips/isa_traits.cc @@ -27,32 +27,121 @@ */ #include "arch/mips/isa_traits.hh" +#include "config/full_system.hh" #include "cpu/static_inst.hh" #include "sim/serialize.hh" -// Alpha UNOP (ldq_u r31,0(r0)) -// @todo: fix to MIPS specific +using namespace MipsISA; + +const Addr MipsISA::PageShift = 13; +const Addr MipsISA::PageBytes = ULL(1) << PageShift; +const Addr MipsISA::PageMask = ~(PageBytes - 1); +const Addr MipsISA::PageOffset = PageBytes - 1; + +#if FULL_SYSTEM + +//////////////////////////////////////////////////////////////////////// +// +// Translation stuff +// + +const Addr MipsISA::PteShift = 3; +const Addr MipsISA::NPtePageShift = PageShift - PteShift; +const Addr MipsISA::NPtePage = ULL(1) << NPtePageShift; +const Addr MipsISA::PteMask = NPtePage - 1; + +// User Virtual +const Addr MipsISA::USegBase = ULL(0x0); +const Addr MipsISA::USegEnd = ULL(0x000003ffffffffff); + +// Kernel Direct Mapped +const Addr MipsISA::K0SegBase = ULL(0xfffffc0000000000); +const Addr MipsISA::K0SegEnd = ULL(0xfffffdffffffffff); + +// Kernel Virtual +const Addr MipsISA::K1SegBase = ULL(0xfffffe0000000000); +const Addr MipsISA::K1SegEnd = ULL(0xffffffffffffffff); + +#endif + +// Mips UNOP (ldq_u r31,0(r0)) const MachInst MipsISA::NoopMachInst = 0x2ffe0000; +static inline Addr +TruncPage(Addr addr) +{ return addr & ~(MipsISA::PageBytes - 1); } + +static inline Addr +RoundPage(Addr addr) +{ return (addr + MipsISA::PageBytes - 1) & ~(MipsISA::PageBytes - 1); } void -MipsISA::RegFile::serialize(std::ostream &os) +RegFile::serialize(std::ostream &os) { - intRegFile.serialize(os); - floatRegFile.serialize(os); - miscRegs.serialize(os); + SERIALIZE_ARRAY(intRegFile, NumIntRegs); + SERIALIZE_ARRAY(floatRegFile.q, NumFloatRegs); + SERIALIZE_SCALAR(miscRegs.fpcr); + SERIALIZE_SCALAR(miscRegs.uniq); + SERIALIZE_SCALAR(miscRegs.lock_flag); + SERIALIZE_SCALAR(miscRegs.lock_addr); SERIALIZE_SCALAR(pc); SERIALIZE_SCALAR(npc); +#if FULL_SYSTEM + SERIALIZE_ARRAY(palregs, NumIntRegs); + SERIALIZE_ARRAY(ipr, NumInternalProcRegs); + SERIALIZE_SCALAR(intrflag); + SERIALIZE_SCALAR(pal_shadow); +#endif } void -MipsISA::RegFile::unserialize(Checkpoint *cp, const std::string §ion) +RegFile::unserialize(Checkpoint *cp, const std::string §ion) { - intRegFile.unserialize(cp, section); - floatRegFile.unserialize(cp, section); - miscRegs.unserialize(cp, section); + UNSERIALIZE_ARRAY(intRegFile, NumIntRegs); + UNSERIALIZE_ARRAY(floatRegFile.q, NumFloatRegs); + UNSERIALIZE_SCALAR(miscRegs.fpcr); + UNSERIALIZE_SCALAR(miscRegs.uniq); + UNSERIALIZE_SCALAR(miscRegs.lock_flag); + UNSERIALIZE_SCALAR(miscRegs.lock_addr); UNSERIALIZE_SCALAR(pc); UNSERIALIZE_SCALAR(npc); +#if FULL_SYSTEM + UNSERIALIZE_ARRAY(palregs, NumIntRegs); + UNSERIALIZE_ARRAY(ipr, NumInternalProcRegs); + UNSERIALIZE_SCALAR(intrflag); + UNSERIALIZE_SCALAR(pal_shadow); +#endif +} + + +#if FULL_SYSTEM +void +PTE::serialize(std::ostream &os) +{ + SERIALIZE_SCALAR(tag); + SERIALIZE_SCALAR(ppn); + SERIALIZE_SCALAR(xre); + SERIALIZE_SCALAR(xwe); + SERIALIZE_SCALAR(asn); + SERIALIZE_SCALAR(asma); + SERIALIZE_SCALAR(fonr); + SERIALIZE_SCALAR(fonw); + SERIALIZE_SCALAR(valid); +} + + +void +PTE::unserialize(Checkpoint *cp, const std::string §ion) +{ + UNSERIALIZE_SCALAR(tag); + UNSERIALIZE_SCALAR(ppn); + UNSERIALIZE_SCALAR(xre); + UNSERIALIZE_SCALAR(xwe); + UNSERIALIZE_SCALAR(asn); + UNSERIALIZE_SCALAR(asma); + UNSERIALIZE_SCALAR(fonr); + UNSERIALIZE_SCALAR(fonw); + UNSERIALIZE_SCALAR(valid); } #endif //FULL_SYSTEM |