revamping code to appropriately handle FP condition code and conversion ops.

There still needs to be a work around to handle the paired singles operations ...

arch/mips/isa/decoder.isa:
    More revamping of the floating point ops in decoder.isa. Change all of the
    "convert and round" functions to fpConvert. Also, the utility functions
    roundFP, truncFP, and unorderedFP are in place everywhere. Things
    have been set up to appropriately use the FP condition codes in the decoder.isa
    The fp.isa format file and the isa_traits.cc file now needed to be updated
    to implement the appropriate "backend" operations/functionality...
arch/mips/isa_traits.hh:
    Remove convert & round functions
    Add roundFP, truncFP,unorderedFP, and the get/setFPconditionCode
    functions
arch/mips/isa_traits.cc:
    Add utility functions

--HG--
extra : convert_revision : 3d6708388abae5b432467f528d52e6343afecd9c

1 files changed, 7 insertions, 3 deletions

diff --git a/arch/mips/isa_traits.hh b/arch/mips/isa_traits.hh
index 33c490dcc..d009bbea5 100644
--- a/arch/mips/isa_traits.hh
+++ b/arch/mips/isa_traits.hh
@@ -137,9 +137,13 @@ namespace MipsISA
 
     void copyRegs(ExecContext *src, ExecContext *dest);
 
-    uint64_t convert_and_round(uint32_t fp_val, ConvertType cvt_type, int rnd_mode = 0);
-    uint64_t convert_and_round(uint64_t fp_val, ConvertType cvt_type, int rnd_mode = 0);
-    uint64_t convert_and_round(double fp_val, ConvertType cvt_type, int rnd_mode = 0);
+    uint64_t fpConvert(double fp_val, ConvertType cvt_type);
+    double roundFP(double val);
+    inline double truncFP(double val);
+    bool unorderedFP(uint32_t val);
+    bool unorderedFP(uint64_t val);
+    bool getConditionCode(int cc);
+    void setConditionCode(int num, bool val);
 
     // Machine operations