Start working on more complex FP tests

Debug FP instructions to handle these FP insts

arch/mips/isa/bitfields.isa:
    add Bitfield for Floating Point Condition Codes
arch/mips/isa/decoder.isa:
    Follow instruction naming style with FP single insts
    Send the float value to the convert&round functions in single FP
    add ll inst support
    add 'token' sc support
arch/mips/isa_traits.cc:
    Add SINGLE->WORD, WORD->SINGLE, & WORD->DOUBLE conversions
arch/mips/regfile.hh:
    update header files
arch/mips/regfile/float_regfile.hh:
    Add more FP registers

--HG--
rename : arch/mips/int_regfile.hh => arch/mips/regfile/int_regfile.hh
rename : arch/mips/misc_regfile.hh => arch/mips/regfile/misc_regfile.hh
extra : convert_revision : 92faf0bfd8542ade762ac569ec158d198f6a9c7e

1 files changed, 3 insertions, 3 deletions

diff --git a/arch/mips/regfile.hh b/arch/mips/regfile.hh
index 3dcf8ef18..bd825d479 100644
--- a/arch/mips/regfile.hh
+++ b/arch/mips/regfile.hh
@@ -31,9 +31,9 @@
 
 #include "arch/mips/types.hh"
 #include "arch/mips/constants.hh"
-#include "arch/mips/int_regfile.hh"
-#include "arch/mips/float_regfile.hh"
-#include "arch/mips/misc_regfile.hh"
+#include "arch/mips/regfile/int_regfile.hh"
+#include "arch/mips/regfile/float_regfile.hh"
+#include "arch/mips/regfile/misc_regfile.hh"
 #include "sim/faults.hh"
 
 class Checkpoint;