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author | Gabe Black <gblack@eecs.umich.edu> | 2006-04-18 09:27:22 -0400 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-04-18 09:27:22 -0400 |
commit | 3d99b4a5447abb1ccca552cee281137e2b11a674 (patch) | |
tree | b2c5fe75b956939247339e44cc546eb71393f9d5 /arch/sparc/isa/base.isa | |
parent | 832311a17094501a6883100ac9dba8c781211782 (diff) | |
download | gem5-3d99b4a5447abb1ccca552cee281137e2b11a674.tar.xz |
Fixes to SPARC syscall emulation mode.
arch/sparc/isa/base.isa:
Added a set of abbreviations for the different condition tests.
arch/sparc/isa/decoder.isa:
Fixes and additions to get syscall emulation closer to working.
arch/sparc/isa/formats/branch.isa:
Fixed branches so that the immediate version actually uses the immediate value
arch/sparc/isa/formats/integerop.isa:
Compute the condition codes -before- writing to the state of the machine.
arch/sparc/isa/formats/mem.isa:
An attempt to fix up the output of the disassembly of loads and stores.
arch/sparc/isa/formats/trap.isa:
Added code to disassemble a trap instruction. This probably needs to be fixed up so there are immediate and register versions.
arch/sparc/isa/operands.isa:
Added an R1 operand, and fixed up the numbering
arch/sparc/isa_traits.hh:
SyscallNumReg is no longer needed, the max number of sources and destinations are fixed up, and the syscall return uses xcc instead of icc.
arch/sparc/linux/process.cc:
arch/sparc/linux/process.hh:
Added a getresuidFunc syscall implementation. This isn't actually used, but I thought it was and will leave it in.
arch/sparc/process.cc:
arch/sparc/process.hh:
Fixed up how the initial stack frame is set up.
arch/sparc/regfile.hh:
Changed the number of windows from 6 to 32 so we don't have to worry about spill and fill traps for now, and commented out the register file setting itself up.
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/simple/cpu.hh:
sim/process.cc:
sim/process.hh:
Changed the syscall mechanism to pass down the syscall number directly.
--HG--
extra : convert_revision : 15723b949a0ddb3d24e68c079343b4dba2439f43
Diffstat (limited to 'arch/sparc/isa/base.isa')
-rw-r--r-- | arch/sparc/isa/base.isa | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/sparc/isa/base.isa b/arch/sparc/isa/base.isa index 434426ffa..cb370a3e7 100644 --- a/arch/sparc/isa/base.isa +++ b/arch/sparc/isa/base.isa @@ -37,6 +37,8 @@ output header {{ OverflowSet=0x7 }; + extern char * CondTestAbbrev[]; + /** * Base class for all SPARC static instructions. */ @@ -65,6 +67,29 @@ output header {{ } }}; +output decoder {{ + + char * CondTestAbbrev[] = + { + "nev", //Never + "e", //Equal + "le", //Less or Equal + "l", //Less + "leu", //Less or Equal Unsigned + "c", //Carry set + "n", //Negative + "o", //Overflow set + "a", //Always + "ne", //Not Equal + "g", //Greater + "ge", //Greater or Equal + "gu", //Greater Unsigned + "cc", //Carry clear + "p", //Positive + "oc" //Overflow Clear + }; +}}; + def template ROrImmDecode {{ { return (I ? (SparcStaticInst *)(new %(class_name)sImm(machInst)) |