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authorGabe Black <gblack@eecs.umich.edu>2006-04-18 09:44:45 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-04-18 09:44:45 -0400
commitcae6b571d63b38c3177f5b47891021ba69386453 (patch)
tree6039a7ce3381b6c5448fc127bdb7b063ae52115e /arch/sparc/isa/base.isa
parent0534e355b77497a1272f6078edae1692d87a15cf (diff)
parent609c4ecea618c6406e50432e38882925db7b7ede (diff)
downloadgem5-cae6b571d63b38c3177f5b47891021ba69386453.tar.xz
Merge m5.eecs.umich.edu:/bk/newmem
into ewok.(none):/home/gblack/m5/newmem --HG-- extra : convert_revision : 3eb97976caf57e43119a998c31128ca6f163c05b
Diffstat (limited to 'arch/sparc/isa/base.isa')
-rw-r--r--arch/sparc/isa/base.isa25
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/sparc/isa/base.isa b/arch/sparc/isa/base.isa
index 434426ffa..cb370a3e7 100644
--- a/arch/sparc/isa/base.isa
+++ b/arch/sparc/isa/base.isa
@@ -37,6 +37,8 @@ output header {{
OverflowSet=0x7
};
+ extern char * CondTestAbbrev[];
+
/**
* Base class for all SPARC static instructions.
*/
@@ -65,6 +67,29 @@ output header {{
}
}};
+output decoder {{
+
+ char * CondTestAbbrev[] =
+ {
+ "nev", //Never
+ "e", //Equal
+ "le", //Less or Equal
+ "l", //Less
+ "leu", //Less or Equal Unsigned
+ "c", //Carry set
+ "n", //Negative
+ "o", //Overflow set
+ "a", //Always
+ "ne", //Not Equal
+ "g", //Greater
+ "ge", //Greater or Equal
+ "gu", //Greater Unsigned
+ "cc", //Carry clear
+ "p", //Positive
+ "oc" //Overflow Clear
+ };
+}};
+
def template ROrImmDecode {{
{
return (I ? (SparcStaticInst *)(new %(class_name)sImm(machInst))