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authorGabe Black <gblack@eecs.umich.edu>2006-04-30 01:46:00 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-04-30 01:46:00 -0400
commita8fbc4ec76169a6d735817df2aa8bc2085df5ac8 (patch)
tree72e8e89ef256a116d483cb15124dc0ba8c8f3b18 /arch/sparc/isa/formats/integerop.isa
parent6a2e0388cf04fbdac68ed9543e4573a13c7f9b17 (diff)
downloadgem5-a8fbc4ec76169a6d735817df2aa8bc2085df5ac8.tar.xz
Got hello world to work!
arch/sparc/isa/decoder.isa: Made sure if a register was assigned to along some control path, then all paths on which no exception would block commit set a value as well. Also, Rs1 is treated as signed for bpr instructions. arch/sparc/isa/formats/integerop.isa: Added an IntOpImm11 class which sign extends the SIMM11 immediate field. arch/sparc/isa/formats/mem.isa: Fixed how offsets are used, and how disassembly is generated. arch/sparc/linux/process.cc: Added fstat and exit_group syscalls. --HG-- extra : convert_revision : 3b4427d239d254a92179a4137441125b8a364264
Diffstat (limited to 'arch/sparc/isa/formats/integerop.isa')
-rw-r--r--arch/sparc/isa/formats/integerop.isa15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/sparc/isa/formats/integerop.isa b/arch/sparc/isa/formats/integerop.isa
index 407a3e3cd..881154b67 100644
--- a/arch/sparc/isa/formats/integerop.isa
+++ b/arch/sparc/isa/formats/integerop.isa
@@ -62,6 +62,21 @@ output header {{
};
/**
+ * Base class for 11 bit immediate integer operations.
+ */
+ class IntOpImm11 : public IntOpImm
+ {
+ protected:
+ // Constructor
+ IntOpImm11(const char *mnem, ExtMachInst _machInst,
+ OpClass __opClass) :
+ IntOpImm(mnem, _machInst, __opClass)
+ {
+ imm = sign_ext(SIMM11, 11);
+ }
+ };
+
+ /**
* Base class for 13 bit immediate integer operations.
*/
class IntOpImm13 : public IntOpImm