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authorGabe Black <gblack@eecs.umich.edu>2006-04-28 13:13:35 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-04-28 13:13:35 -0400
commit9eaedf314b5166ef52e7dd4be81b8a3c40276025 (patch)
treef1356e2d9fcb08f0da466b7dc2f1fa294c6a93b0 /arch/sparc/isa/formats/mem.isa
parentcba0c3736b52e56018b1784fd66ed40224b8c91b (diff)
downloadgem5-9eaedf314b5166ef52e7dd4be81b8a3c40276025.tar.xz
Improved the initial stack frame
arch/sparc/isa/formats/mem.isa: Added some debugging output --HG-- extra : convert_revision : cea88e2b3eddfa4e60bbbcb02f459d274d80db2e
Diffstat (limited to 'arch/sparc/isa/formats/mem.isa')
-rw-r--r--arch/sparc/isa/formats/mem.isa1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/sparc/isa/formats/mem.isa b/arch/sparc/isa/formats/mem.isa
index e15349c7b..ab8b85a94 100644
--- a/arch/sparc/isa/formats/mem.isa
+++ b/arch/sparc/isa/formats/mem.isa
@@ -104,6 +104,7 @@ def template MemExecute {{
%(op_decl)s;
%(op_rd)s;
%(ea_code)s;
+ DPRINTF(Sparc, "The address is 0x%x\n", EA);
%(load)s;
%(code)s;
%(store)s;