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authorGabe Black <gblack@eecs.umich.edu>2006-04-18 09:27:22 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-04-18 09:27:22 -0400
commit3d99b4a5447abb1ccca552cee281137e2b11a674 (patch)
treeb2c5fe75b956939247339e44cc546eb71393f9d5 /arch/sparc/isa_traits.hh
parent832311a17094501a6883100ac9dba8c781211782 (diff)
downloadgem5-3d99b4a5447abb1ccca552cee281137e2b11a674.tar.xz
Fixes to SPARC syscall emulation mode.
arch/sparc/isa/base.isa: Added a set of abbreviations for the different condition tests. arch/sparc/isa/decoder.isa: Fixes and additions to get syscall emulation closer to working. arch/sparc/isa/formats/branch.isa: Fixed branches so that the immediate version actually uses the immediate value arch/sparc/isa/formats/integerop.isa: Compute the condition codes -before- writing to the state of the machine. arch/sparc/isa/formats/mem.isa: An attempt to fix up the output of the disassembly of loads and stores. arch/sparc/isa/formats/trap.isa: Added code to disassemble a trap instruction. This probably needs to be fixed up so there are immediate and register versions. arch/sparc/isa/operands.isa: Added an R1 operand, and fixed up the numbering arch/sparc/isa_traits.hh: SyscallNumReg is no longer needed, the max number of sources and destinations are fixed up, and the syscall return uses xcc instead of icc. arch/sparc/linux/process.cc: arch/sparc/linux/process.hh: Added a getresuidFunc syscall implementation. This isn't actually used, but I thought it was and will leave it in. arch/sparc/process.cc: arch/sparc/process.hh: Fixed up how the initial stack frame is set up. arch/sparc/regfile.hh: Changed the number of windows from 6 to 32 so we don't have to worry about spill and fill traps for now, and commented out the register file setting itself up. cpu/cpu_exec_context.hh: cpu/exec_context.hh: cpu/simple/cpu.hh: sim/process.cc: sim/process.hh: Changed the syscall mechanism to pass down the syscall number directly. --HG-- extra : convert_revision : 15723b949a0ddb3d24e68c079343b4dba2439f43
Diffstat (limited to 'arch/sparc/isa_traits.hh')
-rw-r--r--arch/sparc/isa_traits.hh7
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/sparc/isa_traits.hh b/arch/sparc/isa_traits.hh
index 57206c5e5..453d14664 100644
--- a/arch/sparc/isa_traits.hh
+++ b/arch/sparc/isa_traits.hh
@@ -118,13 +118,12 @@ namespace SparcISA
const int ArgumentReg3 = 11;
const int ArgumentReg4 = 12;
const int ArgumentReg5 = 13;
- const int SyscallNumReg = 1;
// Some OS syscall use a second register (o1) to return a second value
const int SyscallPseudoReturnReg = ArgumentReg1;
//XXX These numbers are bogus
const int MaxInstSrcRegs = 8;
- const int MaxInstDestRegs = 3;
+ const int MaxInstDestRegs = 9;
typedef uint64_t IntReg;
@@ -174,11 +173,11 @@ namespace SparcISA
// and put the return value itself in the standard return value reg ().
if (return_value.successful()) {
// no error
- regs->setMiscReg(MISCREG_CCR_ICC_C, 0);
+ regs->setMiscReg(MISCREG_CCR_XCC_C, 0);
regs->setIntReg(ReturnValueReg, return_value.value());
} else {
// got an error, return details
- regs->setMiscReg(MISCREG_CCR_ICC_C, 1);
+ regs->setMiscReg(MISCREG_CCR_XCC_C, 1);
regs->setIntReg(ReturnValueReg, return_value.value());
}
}