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author | Ali Saidi <saidi@eecs.umich.edu> | 2006-03-09 15:42:09 -0500 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2006-03-09 15:42:09 -0500 |
commit | ce3a6343b6c54e95d63403d46c9ddea384e49476 (patch) | |
tree | 2acc56fa5c2ea2230658ed9b23a17364a241fdab /arch/sparc/isa_traits.hh | |
parent | ab67095b2a43b5f2d44d1e1a517d1079ddf9f104 (diff) | |
download | gem5-ce3a6343b6c54e95d63403d46c9ddea384e49476.tar.xz |
no more common syscall emulation, now common for everyone
check abi-tag note section of elf binary for OS
add pseudo functions (moved from alpha and made to be generic)
move setsyscallreturn into isa traits
arch/alpha/SConscript:
no more common syscall emulation, now common for everyone
arch/alpha/isa_traits.hh:
move setsyscallreturn into isa description
arch/alpha/linux/process.cc:
arch/alpha/tru64/process.cc:
use generic functions rather than alpha specific ones
arch/sparc/isa_traits.hh:
have consts for generic pseudo syscalls
arch/sparc/linux/process.cc:
use generic functions
base/loader/elf_object.cc:
check abi-tag note section of elf binary for OS
cpu/exec_context.hh:
move syssyscallreturn into isa traits
sim/process.cc:
find call num with a more generic
sim/syscall_emul.cc:
sim/syscall_emul.hh:
add pseudo functions (moved from alpha and made to be generic)
--HG--
extra : convert_revision : 5a31024ecde7e39b830365ddd84593ea501a34d2
Diffstat (limited to 'arch/sparc/isa_traits.hh')
-rw-r--r-- | arch/sparc/isa_traits.hh | 32 |
1 files changed, 31 insertions, 1 deletions
diff --git a/arch/sparc/isa_traits.hh b/arch/sparc/isa_traits.hh index 5a58bbaef..7f654e33b 100644 --- a/arch/sparc/isa_traits.hh +++ b/arch/sparc/isa_traits.hh @@ -78,7 +78,21 @@ namespace SparcISA // semantically meaningful register indices ZeroReg = 0 // architecturally meaningful // the rest of these depend on the ABI - }; + SyscallNumReg = 1, + ArgumentReg0 = 8, + ArgumentReg1 = 9, + ArgumentReg2 = 10, + ArgumentReg3 = 11, + ArgumentReg4 = 12, + ArgumentReg5 = 13, + StackPoniterReg = 14, + ReturnAddressReg = 31, // Post Call, precall, 15 + ReturnValueReg = 8, // Post return, 24 is pre-return. + // Some OS use a second register (o1) to return a second value + // for some syscalls + SyscallPseudoReturnReg = 9, + FramePointerReg = 30 +}; typedef uint64_t IntReg; class IntRegFile @@ -455,6 +469,22 @@ namespace SparcISA */ template <class XC> static void zeroRegisters(XC *xc); + + static inline setSyscallReturn(SyscallReturn return_value, RegFile *regs) + { + // check for error condition. SPARC syscall convention is to + // indicate success/failure in reg the carry bit of the ccr + // and put the return value itself in the standard return value reg (). + if (return_value.successful()) { + // no error + regs->miscRegFile.ccrFields.iccFields.c = 0; + regs->intRegFile[ReturnValueReg] = return_value.value(); + } else { + // got an error, return details + regs->miscRegFile.ccrFields.iccFields.c = 1; + regs->intRegFile[ReturnValueReg] = -return_value.value(); + } + } }; const int VMPageSize = TheISA::VMPageSize; |