Fixes to SPARC syscall emulation mode.

arch/sparc/isa/base.isa:
    Added a set of abbreviations for the different condition tests.
arch/sparc/isa/decoder.isa:
    Fixes and additions to get syscall emulation closer to working.
arch/sparc/isa/formats/branch.isa:
    Fixed branches so that the immediate version actually uses the immediate value
arch/sparc/isa/formats/integerop.isa:
    Compute the condition codes -before- writing to the state of the machine.
arch/sparc/isa/formats/mem.isa:
    An attempt to fix up the output of the disassembly of loads and stores.
arch/sparc/isa/formats/trap.isa:
    Added code to disassemble a trap instruction. This probably needs to be fixed up so there are immediate and register versions.
arch/sparc/isa/operands.isa:
    Added an R1 operand, and fixed up the numbering
arch/sparc/isa_traits.hh:
    SyscallNumReg is no longer needed, the max number of sources and destinations are fixed up, and the syscall return uses xcc instead of icc.
arch/sparc/linux/process.cc:
arch/sparc/linux/process.hh:
    Added a getresuidFunc syscall implementation. This isn't actually used, but I thought it was and will leave it in.
arch/sparc/process.cc:
arch/sparc/process.hh:
    Fixed up how the initial stack frame is set up.
arch/sparc/regfile.hh:
    Changed the number of windows from 6 to 32 so we don't have to worry about spill and fill traps for now, and commented out the register file setting itself up.
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/simple/cpu.hh:
sim/process.cc:
sim/process.hh:
    Changed the syscall mechanism to pass down the syscall number directly.

--HG--
extra : convert_revision : 15723b949a0ddb3d24e68c079343b4dba2439f43

1 files changed, 16 insertions, 0 deletions

diff --git a/arch/sparc/process.hh b/arch/sparc/process.hh
index cc4d0ae0a..7b2aec7b9 100644
--- a/arch/sparc/process.hh
+++ b/arch/sparc/process.hh
@@ -39,6 +39,20 @@ class System;
 class SparcLiveProcess : public LiveProcess
 {
   protected:
+    typedef struct
+    {
+        int64_t a_type;
+        union {
+            int64_t a_val;
+            Addr    a_ptr;
+            Addr    a_fcn;
+        };
+    } m5_auxv_t;
+
+    static const Addr StackBias = 2047;
+
+    std::vector<m5_auxv_t> auxv;
+
     SparcLiveProcess(const std::string &nm, ObjectFile *objFile,
                 System *_system, int stdin_fd, int stdout_fd, int stderr_fd,
                 std::vector<std::string> &argv,
@@ -57,6 +71,8 @@ class SparcLiveProcess : public LiveProcess
                                std::vector<std::string> &argv,
                                std::vector<std::string> &envp);
 
+    void argsInit(int intSize, int pageSize);
+
 };
 
 #endif // __SPARC_PROCESS_HH__