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authorKorey Sewell <ksewell@umich.edu>2006-02-20 01:49:16 -0500
committerKorey Sewell <ksewell@umich.edu>2006-02-20 01:49:16 -0500
commit38ce95db3b7cf471dcd3c12b784877c4dc238d6f (patch)
treee3ece4539650ef0ce61c1b779dacd1feb90af4f3 /arch
parent7c642b710679f01d4ec43e6562dd854180dd8c41 (diff)
downloadgem5-38ce95db3b7cf471dcd3c12b784877c4dc238d6f.tar.xz
Support for All Jump Instructions ...
Redo format for Branches and Jumps ( Must update NNPC not NPC ) Now all branches and jumps look like they auto-generate correctly from isa_parser.py!!! arch/mips/isa/decoder.isa: Support for All Jump Instructions .. arch/mips/isa/formats/branch.isa: Redo format for Branches and Jumps ( Must update NNPC not NPC ) arch/mips/isa/formats/util.isa: define clear_exe_inst_hazards for later use --HG-- extra : convert_revision : 63618ed12ee6ed94c47d29619cc1cab2cbaf5cda
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/isa/decoder.isa20
-rw-r--r--arch/mips/isa/formats/branch.isa40
-rw-r--r--arch/mips/isa/formats/util.isa10
3 files changed, 46 insertions, 24 deletions
diff --git a/arch/mips/isa/decoder.isa b/arch/mips/isa/decoder.isa
index f46024f15..e3889ef7a 100644
--- a/arch/mips/isa/decoder.isa
+++ b/arch/mips/isa/decoder.isa
@@ -58,15 +58,17 @@ decode OPCODE_HI default Unknown::unknown() {
//Table A-3 Note: "Specific encodings of the hint field are used
//to distinguish JR from JR.HB and JALR from JALR.HB"
- format Unconditional {
+ format Jump {
0x0: decode HINT {
- 0:jr({{ }},IsReturn,IsLink);
- 1:jr_hb({{ }},IsReturn,IsLink);
+ 0:jr({{ NNPC = Rs; }},IsReturn);
+
+ 1:jr_hb({{ NNPC = Rs; clear_exe_inst_hazards(); }},IsReturn);
}
0x1: decode HINT {
- 0: jalr({{ }},'IsCall','IsReturn','IsLink');
- 1: jalr_hb({{ }},IsCall,IsReturn,IsLink);
+ 0: jalr({{ NNPC = Rs; }},IsCall,IsReturn);
+
+ 1: jalr_hb({{ NNPC = Rs; clear_exe_inst_hazards();}},IsCall,IsReturn);
}
}
@@ -75,7 +77,6 @@ decode OPCODE_HI default Unknown::unknown() {
0x3: movn({{ if (Rt != 0) Rd = Rs; }});
}
-
format WarnUnimpl {
0x4: syscall();//{{ xc->syscall()}},IsNonSpeculative
0x5: break();
@@ -196,9 +197,10 @@ decode OPCODE_HI default Unknown::unknown() {
}
}
- format Unconditional {
- 0x2: j({{ }});
- 0x3: jal({{ }},IsCall,IsLink);
+ format Jump {
+ 0x2: j({{ NNPC = (NPC & 0xF0000000) & (0x00000000 & JMPTARG << 2);}});
+
+ 0x3: jal({{ NNPC = (NPC & 0xF0000000) & (0x00000000 & JMPTARG << 2);}},IsCall,IsLink);
}
format Branch {
diff --git a/arch/mips/isa/formats/branch.isa b/arch/mips/isa/formats/branch.isa
index 1f7a6f330..fc207fd3f 100644
--- a/arch/mips/isa/formats/branch.isa
+++ b/arch/mips/isa/formats/branch.isa
@@ -250,20 +250,22 @@ output decoder {{
}};
def format Branch(code,*flags) {{
- code = 'bool cond;\n\t' + code + '\n'
-
#Add Link Code if Link instruction
strlen = len(name)
if name[strlen-2:] == 'al':
- code += 'R31 = NPC + 4;\n'
+ code += 'R31 = NNPC;\n'
- # condition code
- code += 'if (cond) {'
- code += ' NPC = NPC + disp;\n'
- code += ' NNPC = NNPC + disp;\n } \n'
+ #Condition code
+ code = 'bool cond;\n' + code
+ code += 'if (cond) {\n'
+ #code += '//NPC=NPC: just placeholder to force parser to writeback NPC\n'
+ #code += ' NPC = NPC; \n'
+ code += ' NNPC = NPC + disp;\n'
+ code += '} \n'
iop = InstObjParams(name, Name, 'Branch', CodeBlock(code),
('IsDirectControl', 'IsCondControl'))
+
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
decode_block = BasicDecode.subst(iop)
@@ -272,30 +274,38 @@ def format Branch(code,*flags) {{
def format BranchLikely(code,*flags) {{
- code = 'bool cond;\n\t\t\t' + code
-
#Add Link Code if Link instruction
strlen = len(name)
if name[strlen-3:] == 'all':
- code += 'R31 = NPC + 4;\n'
+ code += 'R31 = NNPC;\n'
- #condition code
+ #Condition code
+ code = 'bool cond;\n' + code
code += 'if (cond) {'
- code += ' NPC = NPC + disp;\n'
- code += ' NNPC = NNPC + disp;\n } \n'
+ #code += '//NPC=NPC: just placeholder to force parser to writeback NPC\n'
+ #code += 'NPC = NPC; \n'
+ code += 'NNPC = NPC + disp;\n'
+ code += '} \n'
iop = InstObjParams(name, Name, 'Branch', CodeBlock(code),
('IsDirectControl', 'IsCondControl','IsCondDelaySlot'))
+
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
decode_block = BasicDecode.subst(iop)
exec_output = BasicExecute.subst(iop)
}};
-def format Unconditional(code,*flags) {{
- iop = InstObjParams(name, Name, 'Jump', CodeBlock(code),
+def format Jump(code,*flags) {{
+ #Add Link Code if Link instruction
+ strlen = len(name)
+ if strlen >= 3 and name[2:3] == 'al':
+ code = 'R31 = NNPC;\n' + code
+
+ iop = InstObjParams(name, Name, 'Jump', CodeBlock(code),\
('IsIndirectControl', 'IsUncondControl'))
+
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
decode_block = BasicDecode.subst(iop)
diff --git a/arch/mips/isa/formats/util.isa b/arch/mips/isa/formats/util.isa
index c6dae6783..1eff92269 100644
--- a/arch/mips/isa/formats/util.isa
+++ b/arch/mips/isa/formats/util.isa
@@ -24,3 +24,13 @@ def UncondCtrlBase(name, Name, base_class, npc_expr, flags):
return (header_output, decoder_output,
JumpOrBranchDecode.subst(nolink_iop), exec_output)
}};
+
+output exec {{
+
+ /// CLEAR ALL CPU INST/EXE HAZARDS
+ inline void
+ clear_exe_inst_hazards()
+ {
+ //CODE HERE
+ }
+}