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| author | Andrew Schultz <alschult@umich.edu> | 2003-10-24 16:28:04 -0400 |
|---|---|---|
| committer | Andrew Schultz <alschult@umich.edu> | 2003-10-24 16:28:04 -0400 |
| commit | 47399b6c5e3f2b76ac934c4005726c913df0c218 (patch) | |
| tree | 675cf8fd72988537e99504942065c97451f0f20e /arch | |
| parent | df3487c3aa669f1baa3170cd9f04f62b5b228583 (diff) | |
| download | gem5-47399b6c5e3f2b76ac934c4005726c913df0c218.tar.xz | |
Added m5func "resetstats" to allow scriptable reset of statistics inside sim
--HG--
extra : convert_revision : 35a93fe085c2ca7ca1fc8bf887539e0b9c704aaf
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/alpha/isa_desc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index f36413ad8..3a0c1bffe 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -2388,7 +2388,7 @@ decode OPCODE default Unknown::unknown() { 0x1e: hw_rei({{ xc->hwrei(); }}); // M5 special opcodes use the reserved 0x01 opcode space - 0x01: decode M5FUNC { + 0x01: decode M5FUNC{ 0x00: arm({{ Annotate::ARM(xc); xc->kernelStats.arm(); @@ -2408,6 +2408,7 @@ decode OPCODE default Unknown::unknown() { m5_exit(); }}, No_OpClass); 0x30: initparam({{ Ra = xc->cpu->system->init_param; }}); + 0x40: resetstats({{ Statistics::reset(); }}); } } |