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authorSteve Reinhardt <stever@eecs.umich.edu>2003-10-19 17:30:26 -0700
committerSteve Reinhardt <stever@eecs.umich.edu>2003-10-19 17:30:26 -0700
commitf951b00d89c716906069160ab21a6d4b6f7e4d6f (patch)
tree20b9ec386e1fc321d900f4c296bf5a2572e9f290 /arch
parent83d32482dc126d028399ca6701642047f28276dd (diff)
downloadgem5-f951b00d89c716906069160ab21a6d4b6f7e4d6f.tar.xz
Get rid of obsolete code, most of it '#if 0'ed anyway.
Mostly vestiges of Dave's long-gone instruction prefetching stuff. arch/alpha/isa_traits.hh: Delete unused extractInstructionPrefetchTarget(). base/inifile.cc: Delete '#if 0' code cpu/base_cpu.hh: Delete unused filterThisInstructionPrefetch() function. cpu/exetrace.hh: Delete '#if 0' code (obsolete flags). --HG-- extra : convert_revision : c8317f56ba0a0e568daa785825ee938584987bed
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/isa_traits.hh7
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/alpha/isa_traits.hh b/arch/alpha/isa_traits.hh
index 6b78722ad..5e2dac9f3 100644
--- a/arch/alpha/isa_traits.hh
+++ b/arch/alpha/isa_traits.hh
@@ -168,13 +168,6 @@ class AlphaISA
ITOUCH_ANNOTE = 0xffffffff,
};
-#if 0
- static inline Addr
- extractInstructionPrefetchTarget(const MachInst &IR, Addr PC) {
- return(0);
- }
-#endif
-
static inline bool isCallerSaveIntegerRegister(unsigned int reg) {
panic("register classification not implemented");
return (reg >= 1 && reg <= 8 || reg >= 22 && reg <= 25 || reg == 27);