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authorSteve Reinhardt <stever@eecs.umich.edu>2004-02-26 07:05:36 -0800
committerSteve Reinhardt <stever@eecs.umich.edu>2004-02-26 07:05:36 -0800
commit6f5e104fc5683ace0c17ddb402bf8d40330f60aa (patch)
treef7cf19d176c6e89566806db4e0c2d4612daf1d3a /arch
parent6a306d4cafae360c9107a845ee2d08c8667453ae (diff)
downloadgem5-6f5e104fc5683ace0c17ddb402bf8d40330f60aa.tar.xz
Make SW prefetch flag a parameter again, and add code to make
it actually do something on FullCPU. Still disabled, as it causes detailed-boot to hang when you turn it on. arch/alpha/isa_desc: Add EAComp and MemAcc pseudo-instructions to prefetch StaticInst. cpu/simple_cpu/simple_cpu.hh: Changed prefetch() return type from Fault to void. --HG-- extra : convert_revision : c7cb42682bfea6af117c87d4dfdb06176b6fe6b7
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/isa_desc42
1 files changed, 41 insertions, 1 deletions
diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc
index 75b2f4138..6a95b4e04 100644
--- a/arch/alpha/isa_desc
+++ b/arch/alpha/isa_desc
@@ -1000,10 +1000,50 @@ def template PrefetchDeclare {{
*/
class %(class_name)s : public %(base_class)s
{
+ protected:
+
+ /**
+ * "Fake" effective address computation class for "%(mnemonic)s".
+ */
+ class EAComp : public EACompBase
+ {
+ public:
+ /// Constructor
+ EAComp(MachInst machInst)
+ : EACompBase(machInst)
+ {
+ %(ea_constructor)s;
+ }
+ };
+
+ /**
+ * "Fake" memory access instruction class for "%(mnemonic)s".
+ */
+ class MemAcc : public MemAccBase
+ {
+ public:
+ /// Constructor
+ MemAcc(MachInst machInst)
+ : MemAccBase(machInst, %(op_class)s)
+ {
+ %(memacc_constructor)s;
+ }
+ };
+
+ /// Pointer to EAComp object.
+ StaticInstPtr<AlphaISA> eaCompPtr;
+ /// Pointer to MemAcc object.
+ StaticInstPtr<AlphaISA> memAccPtr;
+
public:
+
+ StaticInstPtr<AlphaISA> eaCompInst() { return eaCompPtr; }
+ StaticInstPtr<AlphaISA> memAccInst() { return memAccPtr; }
+
/// Constructor
%(class_name)s(MachInst machInst)
- : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
+ : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s),
+ eaCompPtr(new EAComp(machInst)), memAccPtr(new MemAcc(machInst))
{
%(constructor)s;
}