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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2003-10-24 23:20:27 -0700 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2003-10-24 23:20:27 -0700 |
| commit | 02d80c96b79b8ae4b6f99e657579f36d28844795 (patch) | |
| tree | f16ce564fdcc1a1aa866598fd7399153469a9c00 /arch | |
| parent | 91cb532f9f44874e768ba749df03ca1f4dc07bc9 (diff) | |
| download | gem5-02d80c96b79b8ae4b6f99e657579f36d28844795.tar.xz | |
Move some common full-system CPU initialization from the
SimpleCPU & FullCPU constructors to AlphaISA::initCPU().
cpu/simple_cpu/simple_cpu.cc:
Move some common full-system CPU initialization from the
SimpleCPU & FullCPU constructors to AlphaISA::initCPU().
Make 'fault' local to SimpleCPU::tick.
cpu/simple_cpu/simple_cpu.hh:
Make 'fault' local to SimpleCPU::tick (not an object member).
--HG--
extra : convert_revision : e878dedfff06aac0548aca8b14d66c18b8916895
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/alpha/ev5.cc | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc index cc33f6890..7330d7ce0 100644 --- a/arch/alpha/ev5.cc +++ b/arch/alpha/ev5.cc @@ -47,6 +47,11 @@ void AlphaISA::initCPU(RegFile *regs) { initIPRs(regs); + // CPU comes up with PAL regs enabled + swap_palshadow(regs, true); + + regs->pc = regs->ipr[IPR_PAL_BASE] + fault_addr[Reset_Fault]; + regs->npc = regs->pc + sizeof(MachInst); } void @@ -97,6 +102,7 @@ AlphaISA::initIPRs(RegFile *regs) bzero((char *)ipr, NumInternalProcRegs * sizeof(InternalProcReg)); ipr[IPR_PAL_BASE] = PAL_BASE; + ipr[IPR_MCSR] = 0x6; } |