summaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
authorNathan Binkert <binkertn@umich.edu>2004-05-21 13:39:20 -0400
committerNathan Binkert <binkertn@umich.edu>2004-05-21 13:39:20 -0400
commit62d756f253f8ced44d8a054fa229da4b3cce896a (patch)
tree986dde28ed0d51113d72ad56fd1d55571a09e55d /arch
parentf5c7b1358cf0b27c27c10eae42e09949613e24a9 (diff)
downloadgem5-62d756f253f8ced44d8a054fa229da4b3cce896a.tar.xz
rename namespace Statistics to Stats
--HG-- extra : convert_revision : 28f1703f8d7d8cf33fb952ae450f66bdba860fb7
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/alpha_memory.hh32
-rw-r--r--arch/alpha/pseudo_inst.cc8
2 files changed, 20 insertions, 20 deletions
diff --git a/arch/alpha/alpha_memory.hh b/arch/alpha/alpha_memory.hh
index 12196c44b..b5fc18255 100644
--- a/arch/alpha/alpha_memory.hh
+++ b/arch/alpha/alpha_memory.hh
@@ -80,10 +80,10 @@ class AlphaTLB : public SimObject
class AlphaITB : public AlphaTLB
{
protected:
- mutable Statistics::Scalar<> hits;
- mutable Statistics::Scalar<> misses;
- mutable Statistics::Scalar<> acv;
- mutable Statistics::Formula accesses;
+ mutable Stats::Scalar<> hits;
+ mutable Stats::Scalar<> misses;
+ mutable Stats::Scalar<> acv;
+ mutable Stats::Formula accesses;
protected:
void fault(Addr pc, ExecContext *xc) const;
@@ -98,18 +98,18 @@ class AlphaITB : public AlphaTLB
class AlphaDTB : public AlphaTLB
{
protected:
- mutable Statistics::Scalar<> read_hits;
- mutable Statistics::Scalar<> read_misses;
- mutable Statistics::Scalar<> read_acv;
- mutable Statistics::Scalar<> read_accesses;
- mutable Statistics::Scalar<> write_hits;
- mutable Statistics::Scalar<> write_misses;
- mutable Statistics::Scalar<> write_acv;
- mutable Statistics::Scalar<> write_accesses;
- Statistics::Formula hits;
- Statistics::Formula misses;
- Statistics::Formula acv;
- Statistics::Formula accesses;
+ mutable Stats::Scalar<> read_hits;
+ mutable Stats::Scalar<> read_misses;
+ mutable Stats::Scalar<> read_acv;
+ mutable Stats::Scalar<> read_accesses;
+ mutable Stats::Scalar<> write_hits;
+ mutable Stats::Scalar<> write_misses;
+ mutable Stats::Scalar<> write_acv;
+ mutable Stats::Scalar<> write_accesses;
+ Stats::Formula hits;
+ Stats::Formula misses;
+ Stats::Formula acv;
+ Stats::Formula accesses;
protected:
void fault(Addr pc, uint64_t flags, ExecContext *xc) const;
diff --git a/arch/alpha/pseudo_inst.cc b/arch/alpha/pseudo_inst.cc
index 0a5c5b006..12dacebd9 100644
--- a/arch/alpha/pseudo_inst.cc
+++ b/arch/alpha/pseudo_inst.cc
@@ -37,7 +37,7 @@
#include "sim/stats.hh"
using namespace std;
-using namespace Statistics;
+using namespace Stats;
namespace AlphaPseudo
{
@@ -98,7 +98,7 @@ namespace AlphaPseudo
Tick when = curTick + NS2Ticks(delay);
Tick repeat = NS2Ticks(period);
- using namespace Statistics;
+ using namespace Stats;
SetupEvent(Reset, when, repeat);
}
@@ -114,7 +114,7 @@ namespace AlphaPseudo
Tick when = curTick + NS2Ticks(delay);
Tick repeat = NS2Ticks(period);
- using namespace Statistics;
+ using namespace Stats;
SetupEvent(Dump, when, repeat);
}
@@ -130,7 +130,7 @@ namespace AlphaPseudo
Tick when = curTick + NS2Ticks(delay);
Tick repeat = NS2Ticks(period);
- using namespace Statistics;
+ using namespace Stats;
SetupEvent(Dump|Reset, when, repeat);
}