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authorAli Saidi <saidi@eecs.umich.edu>2006-04-06 00:51:46 -0400
committerAli Saidi <saidi@eecs.umich.edu>2006-04-06 00:51:46 -0400
commitbb80f71f213625e0b33db5cf2256f93caf3d5967 (patch)
tree5498656e24083fb5e2bda4a0bd90b734ed6912fe /arch
parent5936c79ba0f3fd29ef2bbf41fcaddc78fcd9c75c (diff)
downloadgem5-bb80f71f213625e0b33db5cf2256f93caf3d5967.tar.xz
fixes for new memory system
SConscript: comment out most devices add vport.cc arch/alpha/arguments.cc: arch/alpha/arguments.hh: push in alpha name space fix for new memory system arch/alpha/faults.cc: arch/alpha/faults.hh: Added an unimplemented fault that can be returned if a certain function isn't implemented arch/alpha/freebsd/system.cc: arch/alpha/linux/system.cc: arch/alpha/stacktrace.cc: arch/alpha/system.cc: arch/alpha/tlb.hh: arch/alpha/tru64/system.cc: fixed for new memory system arch/alpha/tlb.cc: fixed for new memory system removed code that seems to have no purpose arch/alpha/vtophys.cc: arch/alpha/vtophys.hh: fixed for new memory system put in namespace AlphaISA base/remote_gdb.cc: fix for new memory system cpu/cpu_exec_context.cc: cpu/cpu_exec_context.hh: cpu/exec_context.hh: create two ports one of physical accesses and one for superpage accesses Add functions getVirtPort() getPhysPort() delVirtPort(). To get statically allocated physical or virtual ports or if an execcontext is passed in get a dynamically allocated virtual port dev/alpha_console.cc: dev/alpha_console.hh: Redo for new memory system dev/io_device.cc: dev/io_device.hh: new I/O devices for new memory system kern/linux/events.cc: kern/linux/printk.cc: kern/linux/printk.hh: kern/tru64/dump_mbuf.hh: kern/tru64/printf.cc: kern/tru64/printf.hh: Arguments now in namespaces kern/tru64/tru64_events.cc: mem/bus.cc: fix for new memory syste mem/physical.hh: new addressranges function getPort should be public mem/port.hh: Add write/read methods to functional port update getDeviceAddrRanges to have a list of both snoops and response lists sim/pseudo_inst.cc: sim/system.cc: sim/system.hh: Update for new mem system sim/vptr.hh: comment out code and replace with panics This will need to be fixed at some point, but it's not easy. --HG-- extra : convert_revision : 41f41f422cfbab3751284d55cccb6ea64a7956e2
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/arguments.cc11
-rw-r--r--arch/alpha/arguments.hh12
-rw-r--r--arch/alpha/faults.cc10
-rw-r--r--arch/alpha/faults.hh21
-rw-r--r--arch/alpha/freebsd/system.cc19
-rw-r--r--arch/alpha/linux/system.cc48
-rw-r--r--arch/alpha/stacktrace.cc20
-rw-r--r--arch/alpha/system.cc48
-rw-r--r--arch/alpha/tlb.cc29
-rw-r--r--arch/alpha/tlb.hh6
-rw-r--r--arch/alpha/tru64/system.cc14
-rw-r--r--arch/alpha/vtophys.cc186
-rw-r--r--arch/alpha/vtophys.hh16
13 files changed, 144 insertions, 296 deletions
diff --git a/arch/alpha/arguments.cc b/arch/alpha/arguments.cc
index fe6e78abc..adc371682 100644
--- a/arch/alpha/arguments.cc
+++ b/arch/alpha/arguments.cc
@@ -29,7 +29,7 @@
#include "arch/alpha/arguments.hh"
#include "arch/alpha/vtophys.hh"
#include "cpu/exec_context.hh"
-#include "mem/functional/physical.hh"
+#include "mem/vport.hh"
using namespace AlphaISA;
@@ -59,11 +59,10 @@ AlphaArguments::getArg(bool fp)
return xc->readIntReg(16 + number);
} else {
Addr sp = xc->readIntReg(30);
- Addr paddr = vtophys(xc, sp + (number-6) * sizeof(uint64_t));
- // @todo: This read must go through the system or something else.
-// return xc->getPhysMemPtr()->phys_read_qword(paddr);
- panic("Need to fix alpha arguments\n");
- return 0;
+ VirtualPort *vp = xc->getVirtPort(xc);
+ uint64_t arg = vp->read<uint64_t>(sp + (number-6) * sizeof(uint64_t));
+ xc->delVirtPort(vp);
+ return arg;
}
}
diff --git a/arch/alpha/arguments.hh b/arch/alpha/arguments.hh
index 75346bf58..bd1c6cb1d 100644
--- a/arch/alpha/arguments.hh
+++ b/arch/alpha/arguments.hh
@@ -26,8 +26,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef __ARGUMENTS_HH__
-#define __ARGUMENTS_HH__
+#ifndef __ARCH_ALPHA_ARGUMENTS_HH__
+#define __ARCH_ALPHA_ARGUMENTS_HH__
#include <assert.h>
@@ -37,6 +37,8 @@
class ExecContext;
+namespace AlphaISA {
+
class AlphaArguments
{
protected:
@@ -135,9 +137,11 @@ class AlphaArguments
operator char *() {
char *buf = data->alloc(2048);
- CopyString(xc, buf, getArg(), 2048);
+ CopyStringOut(xc, buf, getArg(), 2048);
return buf;
}
};
-#endif // __ARGUMENTS_HH__
+}; // namespace AlphaISA
+
+#endif // __ARCH_ALPHA_ARGUMENTS_HH__
diff --git a/arch/alpha/faults.cc b/arch/alpha/faults.cc
index 0083aa9f3..c8cb9124e 100644
--- a/arch/alpha/faults.cc
+++ b/arch/alpha/faults.cc
@@ -105,6 +105,10 @@ FaultName IntegerOverflowFault::_name = "intover";
FaultVect IntegerOverflowFault::_vect = 0x0501;
FaultStat IntegerOverflowFault::_count;
+FaultName UnimpFault::_name = "Unimplemented Simulator feature";
+FaultVect UnimpFault::_vect = 0x0001;
+FaultStat UnimpFault::_count;
+
#if FULL_SYSTEM
void AlphaFault::invoke(ExecContext * xc)
@@ -170,6 +174,12 @@ void ItbFault::invoke(ExecContext * xc)
AlphaFault::invoke(xc);
}
+void UnimpFault::invoke(ExecContext * xc)
+{
+ FaultBase::invoke(xc);
+ panic("Unimpfault: %s\n", panicStr.c_str());
+}
+
#endif
} // namespace AlphaISA
diff --git a/arch/alpha/faults.hh b/arch/alpha/faults.hh
index e8ccc6b79..c03d601ad 100644
--- a/arch/alpha/faults.hh
+++ b/arch/alpha/faults.hh
@@ -347,6 +347,27 @@ class IntegerOverflowFault : public AlphaFault
FaultStat & countStat() {return _count;}
};
+class UnimpFault : public AlphaFault
+{
+#if FULL_SYSTEM
+ private:
+ std::string panicStr;
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ UnimpFault(std::string _str)
+ : panicStr(_str)
+ { }
+#endif
+ FaultName name() {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+#if FULL_SYSTEM
+ void invoke(ExecContext * xc);
+#endif
+};
+
} // AlphaISA namespace
#endif // __FAULTS_HH__
diff --git a/arch/alpha/freebsd/system.cc b/arch/alpha/freebsd/system.cc
index e32053afd..3e50fb9a5 100644
--- a/arch/alpha/freebsd/system.cc
+++ b/arch/alpha/freebsd/system.cc
@@ -37,8 +37,8 @@
#include "arch/alpha/freebsd/system.hh"
#include "base/loader/symtab.hh"
#include "cpu/exec_context.hh"
-#include "mem/functional/memory_control.hh"
-#include "mem/functional/physical.hh"
+#include "mem/physical.hh"
+#include "mem/port.hh"
#include "arch/isa_traits.hh"
#include "sim/builder.hh"
#include "sim/byteswap.hh"
@@ -74,20 +74,12 @@ FreebsdAlphaSystem::doCalibrateClocks(ExecContext *xc)
{
Addr ppc_vaddr = 0;
Addr timer_vaddr = 0;
- Addr ppc_paddr = 0;
- Addr timer_paddr = 0;
ppc_vaddr = (Addr)xc->readIntReg(ArgumentReg1);
timer_vaddr = (Addr)xc->readIntReg(ArgumentReg2);
- ppc_paddr = vtophys(physmem, ppc_vaddr);
- timer_paddr = vtophys(physmem, timer_vaddr);
-
- uint8_t *ppc = physmem->dma_addr(ppc_paddr, sizeof(uint32_t));
- uint8_t *timer = physmem->dma_addr(timer_paddr, sizeof(uint32_t));
-
- *(uint32_t *)ppc = htog((uint32_t)Clock::Frequency);
- *(uint32_t *)timer = htog((uint32_t)TIMER_FREQUENCY);
+ virtPort.write(ppc_vaddr, (uint32_t)Clock::Frequency);
+ virtPort.write(timer_vaddr, (uint32_t)TIMER_FREQUENCY);
}
@@ -102,7 +94,6 @@ FreebsdAlphaSystem::SkipCalibrateClocksEvent::process(ExecContext *xc)
BEGIN_DECLARE_SIM_OBJECT_PARAMS(FreebsdAlphaSystem)
Param<Tick> boot_cpu_frequency;
- SimObjectParam<MemoryController *> memctrl;
SimObjectParam<PhysicalMemory *> physmem;
Param<string> kernel;
@@ -125,7 +116,6 @@ END_DECLARE_SIM_OBJECT_PARAMS(FreebsdAlphaSystem)
BEGIN_INIT_SIM_OBJECT_PARAMS(FreebsdAlphaSystem)
INIT_PARAM(boot_cpu_frequency, "Frequency of the boot CPU"),
- INIT_PARAM(memctrl, "memory controller"),
INIT_PARAM(physmem, "phsyical memory"),
INIT_PARAM(kernel, "file that contains the kernel code"),
INIT_PARAM(console, "file that contains the console code"),
@@ -147,7 +137,6 @@ CREATE_SIM_OBJECT(FreebsdAlphaSystem)
AlphaSystem::Params *p = new AlphaSystem::Params;
p->name = getInstanceName();
p->boot_cpu_frequency = boot_cpu_frequency;
- p->memctrl = memctrl;
p->physmem = physmem;
p->kernel_path = kernel;
p->console_path = console;
diff --git a/arch/alpha/linux/system.cc b/arch/alpha/linux/system.cc
index f9275d15e..edd2cdaf1 100644
--- a/arch/alpha/linux/system.cc
+++ b/arch/alpha/linux/system.cc
@@ -46,8 +46,8 @@
#include "dev/platform.hh"
#include "kern/linux/printk.hh"
#include "kern/linux/events.hh"
-#include "mem/functional/memory_control.hh"
-#include "mem/functional/physical.hh"
+#include "mem/physical.hh"
+#include "mem/port.hh"
#include "sim/builder.hh"
#include "sim/byteswap.hh"
@@ -59,7 +59,6 @@ LinuxAlphaSystem::LinuxAlphaSystem(Params *p)
: AlphaSystem(p)
{
Addr addr = 0;
- Addr paddr = 0;
/**
* The symbol swapper_pg_dir marks the beginning of the kernel and
@@ -73,25 +72,17 @@ LinuxAlphaSystem::LinuxAlphaSystem(Params *p)
* Since we aren't using a bootloader, we have to copy the
* kernel arguments directly into the kernel's memory.
*/
- paddr = vtophys(physmem, CommandLine());
- char *commandline = (char *)physmem->dma_addr(paddr, sizeof(uint64_t));
- if (commandline)
- strncpy(commandline, params()->boot_osflags.c_str(), CommandLineSize);
+ virtPort.writeBlob(CommandLine(), (uint8_t*)params()->boot_osflags.c_str(),
+ CommandLineSize);
/**
* find the address of the est_cycle_freq variable and insert it
* so we don't through the lengthly process of trying to
* calculated it by using the PIT, RTC, etc.
*/
- if (kernelSymtab->findAddress("est_cycle_freq", addr)) {
- paddr = vtophys(physmem, addr);
- uint8_t *est_cycle_frequency =
- physmem->dma_addr(paddr, sizeof(uint64_t));
-
- if (est_cycle_frequency)
- *(uint64_t *)est_cycle_frequency =
- Clock::Frequency / p->boot_cpu_frequency;
- }
+ if (kernelSymtab->findAddress("est_cycle_freq", addr))
+ virtPort.write(addr, (uint64_t)(Clock::Frequency /
+ p->boot_cpu_frequency));
/**
@@ -100,16 +91,9 @@ LinuxAlphaSystem::LinuxAlphaSystem(Params *p)
* @todo At some point we should change ev5.hh and the palcode to support
* 255 ASNs.
*/
- if (kernelSymtab->findAddress("dp264_mv", addr)) {
- paddr = vtophys(physmem, addr);
- char *dp264_mv = (char *)physmem->dma_addr(paddr, sizeof(uint64_t));
-
- if (dp264_mv) {
- *(uint32_t*)(dp264_mv+0x18) = LittleEndianGuest::htog((uint32_t)127);
- } else
- panic("could not translate dp264_mv addr\n");
-
- } else
+ if (kernelSymtab->findAddress("dp264_mv", addr))
+ virtPort.write(addr + 0x18, LittleEndianGuest::htog((uint32_t)127));
+ else
panic("could not find dp264_mv\n");
#ifndef NDEBUG
@@ -190,15 +174,10 @@ LinuxAlphaSystem::setDelayLoop(ExecContext *xc)
{
Addr addr = 0;
if (kernelSymtab->findAddress("loops_per_jiffy", addr)) {
- Addr paddr = vtophys(physmem, addr);
-
- uint8_t *loops_per_jiffy =
- physmem->dma_addr(paddr, sizeof(uint32_t));
-
Tick cpuFreq = xc->getCpuPtr()->frequency();
Tick intrFreq = platform->intrFrequency();
- *(uint32_t *)loops_per_jiffy =
- (uint32_t)((cpuFreq / intrFreq) * 0.9988);
+ xc->getVirtPort(xc)->write(addr,
+ (uint32_t)((cpuFreq / intrFreq) * 0.9988));
}
}
@@ -224,7 +203,6 @@ LinuxAlphaSystem::PrintThreadInfo::process(ExecContext *xc)
BEGIN_DECLARE_SIM_OBJECT_PARAMS(LinuxAlphaSystem)
Param<Tick> boot_cpu_frequency;
- SimObjectParam<MemoryController *> memctrl;
SimObjectParam<PhysicalMemory *> physmem;
Param<string> kernel;
@@ -247,7 +225,6 @@ END_DECLARE_SIM_OBJECT_PARAMS(LinuxAlphaSystem)
BEGIN_INIT_SIM_OBJECT_PARAMS(LinuxAlphaSystem)
INIT_PARAM(boot_cpu_frequency, "Frequency of the boot CPU"),
- INIT_PARAM(memctrl, "memory controller"),
INIT_PARAM(physmem, "phsyical memory"),
INIT_PARAM(kernel, "file that contains the kernel code"),
INIT_PARAM(console, "file that contains the console code"),
@@ -269,7 +246,6 @@ CREATE_SIM_OBJECT(LinuxAlphaSystem)
AlphaSystem::Params *p = new AlphaSystem::Params;
p->name = getInstanceName();
p->boot_cpu_frequency = boot_cpu_frequency;
- p->memctrl = memctrl;
p->physmem = physmem;
p->kernel_path = kernel;
p->console_path = console;
diff --git a/arch/alpha/stacktrace.cc b/arch/alpha/stacktrace.cc
index 26656ab5c..8691e12dc 100644
--- a/arch/alpha/stacktrace.cc
+++ b/arch/alpha/stacktrace.cc
@@ -47,23 +47,23 @@ ProcessInfo::ProcessInfo(ExecContext *_xc)
if (!xc->getSystemPtr()->kernelSymtab->findAddress("thread_info_size", addr))
panic("thread info not compiled into kernel\n");
- thread_info_size = *(int32_t *)vtomem(xc, addr, sizeof(int32_t));
+ thread_info_size = gtoh(xc->getVirtPort()->read<int32_t>(addr));
if (!xc->getSystemPtr()->kernelSymtab->findAddress("task_struct_size", addr))
panic("thread info not compiled into kernel\n");
- task_struct_size = *(int32_t *)vtomem(xc, addr, sizeof(int32_t));
+ task_struct_size = gtoh(xc->getVirtPort()->read<int32_t>(addr));
if (!xc->getSystemPtr()->kernelSymtab->findAddress("thread_info_task", addr))
panic("thread info not compiled into kernel\n");
- task_off = *(int32_t *)vtomem(xc, addr, sizeof(int32_t));
+ task_off = gtoh(xc->getVirtPort()->read<int32_t>(addr));
if (!xc->getSystemPtr()->kernelSymtab->findAddress("task_struct_pid", addr))
panic("thread info not compiled into kernel\n");
- pid_off = *(int32_t *)vtomem(xc, addr, sizeof(int32_t));
+ pid_off = gtoh(xc->getVirtPort()->read<int32_t>(addr));
if (!xc->getSystemPtr()->kernelSymtab->findAddress("task_struct_comm", addr))
panic("thread info not compiled into kernel\n");
- name_off = *(int32_t *)vtomem(xc, addr, sizeof(int32_t));
+ name_off = gtoh(xc->getVirtPort()->read<int32_t>(addr));
}
Addr
@@ -73,9 +73,7 @@ ProcessInfo::task(Addr ksp) const
if (base == ULL(0xfffffc0000000000))
return 0;
- Addr task;
- CopyOut(xc, &task, base + task_off, sizeof(task));
- return task;
+ return gtoh(xc->getVirtPort()->read<Addr>(base + task_off));
}
int
@@ -85,9 +83,7 @@ ProcessInfo::pid(Addr ksp) const
if (!task)
return -1;
- uint16_t pid;
- CopyOut(xc, &pid, task + pid_off, sizeof(pid));
- return pid;
+ return gtoh(xc->getVirtPort()->read<uint16_t>(task + pid_off));
}
string
@@ -98,7 +94,7 @@ ProcessInfo::name(Addr ksp) const
return "console";
char comm[256];
- CopyString(xc, comm, task + name_off, sizeof(comm));
+ CopyStringOut(xc, comm, task + name_off, sizeof(comm));
if (!comm[0])
return "startup";
diff --git a/arch/alpha/system.cc b/arch/alpha/system.cc
index 8dfc3cbc4..21ffa350b 100644
--- a/arch/alpha/system.cc
+++ b/arch/alpha/system.cc
@@ -33,8 +33,7 @@
#include "base/loader/object_file.hh"
#include "base/loader/symtab.hh"
#include "base/trace.hh"
-#include "mem/functional/memory_control.hh"
-#include "mem/functional/physical.hh"
+#include "mem/physical.hh"
#include "sim/byteswap.hh"
#include "sim/builder.hh"
@@ -63,8 +62,8 @@ AlphaSystem::AlphaSystem(Params *p)
// Load program sections into memory
- pal->loadSections(&functionalPort, LoadAddrMask);
- console->loadSections(&functionalPort, LoadAddrMask);
+ pal->loadSections(&functionalPort, AlphaISA::LoadAddrMask);
+ console->loadSections(&functionalPort, AlphaISA::LoadAddrMask);
// load symbols
if (!console->loadGlobalSymbols(consoleSymtab))
@@ -97,11 +96,8 @@ AlphaSystem::AlphaSystem(Params *p)
* others do.)
*/
if (consoleSymtab->findAddress("env_booted_osflags", addr)) {
- Addr paddr = vtophys(physmem, addr);
- char *osflags = (char *)physmem->dma_addr(paddr, sizeof(uint32_t));
-
- if (osflags)
- strcpy(osflags, params()->boot_osflags.c_str());
+ virtPort.writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(),
+ strlen(params()->boot_osflags.c_str()));
}
/**
@@ -109,14 +105,11 @@ AlphaSystem::AlphaSystem(Params *p)
* information to Tsunami.
*/
if (consoleSymtab->findAddress("m5_rpb", addr)) {
- Addr paddr = vtophys(physmem, addr);
- char *hwrpb = (char *)physmem->dma_addr(paddr, sizeof(uint64_t));
-
- if (!hwrpb)
- panic("could not translate hwrpb addr\n");
-
- *(uint64_t*)(hwrpb+0x50) = htog(params()->system_type);
- *(uint64_t*)(hwrpb+0x58) = htog(params()->system_rev);
+ uint64_t data;
+ data = htog(params()->system_type);
+ virtPort.write(addr, data);
+ data = htog(params()->system_rev);
+ virtPort.write(addr, data);
} else
panic("could not find hwrpb\n");
@@ -172,16 +165,13 @@ AlphaSystem::fixFuncEventAddr(Addr addr)
const uint32_t gp_ldah_pattern = (9 << 26) | (29 << 21) | (27 << 16);
// lda gp,Y(gp): opcode 8, Ra = 29, rb = 29
const uint32_t gp_lda_pattern = (8 << 26) | (29 << 21) | (29 << 16);
- // instruction size
- const int sz = sizeof(uint32_t);
- Addr paddr = vtophys(physmem, addr);
- uint32_t i1 = *(uint32_t *)physmem->dma_addr(paddr, sz);
- uint32_t i2 = *(uint32_t *)physmem->dma_addr(paddr+sz, sz);
+ uint32_t i1 = virtPort.read<uint32_t>(addr);
+ uint32_t i2 = virtPort.read<uint32_t>(addr + sizeof(AlphaISA::MachInst));
if ((i1 & inst_mask) == gp_ldah_pattern &&
(i2 & inst_mask) == gp_lda_pattern) {
- Addr new_addr = addr + 2*sz;
+ Addr new_addr = addr + 2* sizeof(AlphaISA::MachInst);
DPRINTF(Loader, "fixFuncEventAddr: %p -> %p", addr, new_addr);
return new_addr;
} else {
@@ -195,14 +185,7 @@ AlphaSystem::setAlphaAccess(Addr access)
{
Addr addr = 0;
if (consoleSymtab->findAddress("m5AlphaAccess", addr)) {
- Addr paddr = vtophys(physmem, addr);
- uint64_t *m5AlphaAccess =
- (uint64_t *)physmem->dma_addr(paddr, sizeof(uint64_t));
-
- if (!m5AlphaAccess)
- panic("could not translate m5AlphaAccess addr\n");
-
- *m5AlphaAccess = htog(EV5::Phys2K0Seg(access));
+ virtPort.write(addr, htog(EV5::Phys2K0Seg(access)));
} else
panic("could not find m5AlphaAccess\n");
}
@@ -234,7 +217,6 @@ AlphaSystem::unserialize(Checkpoint *cp, const std::string &section)
BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaSystem)
Param<Tick> boot_cpu_frequency;
- SimObjectParam<MemoryController *> memctrl;
SimObjectParam<PhysicalMemory *> physmem;
Param<std::string> kernel;
@@ -257,7 +239,6 @@ END_DECLARE_SIM_OBJECT_PARAMS(AlphaSystem)
BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaSystem)
INIT_PARAM(boot_cpu_frequency, "Frequency of the boot CPU"),
- INIT_PARAM(memctrl, "memory controller"),
INIT_PARAM(physmem, "phsyical memory"),
INIT_PARAM(kernel, "file that contains the kernel code"),
INIT_PARAM(console, "file that contains the console code"),
@@ -279,7 +260,6 @@ CREATE_SIM_OBJECT(AlphaSystem)
AlphaSystem::Params *p = new AlphaSystem::Params;
p->name = getInstanceName();
p->boot_cpu_frequency = boot_cpu_frequency;
- p->memctrl = memctrl;
p->physmem = physmem;
p->kernel_path = kernel;
p->console_path = console;
diff --git a/arch/alpha/tlb.cc b/arch/alpha/tlb.cc
index 3f991b10c..a1a7c9366 100644
--- a/arch/alpha/tlb.cc
+++ b/arch/alpha/tlb.cc
@@ -93,7 +93,7 @@ AlphaTLB::lookup(Addr vpn, uint8_t asn) const
}
-void
+Fault
AlphaTLB::checkCacheability(CpuRequestPtr &req)
{
// in Alpha, cacheability is controlled by upper-level bits of the
@@ -115,17 +115,7 @@ AlphaTLB::checkCacheability(CpuRequestPtr &req)
#endif
// IPR memory space not implemented
if (PAddrIprSpace(req->paddr)) {
- if (!req->xc->misspeculating()) {
- switch (req->paddr) {
- case ULL(0xFFFFF00188):
- req->data = 0;
- break;
-
- default:
- panic("IPR memory space not implemented! PA=%x\n",
- req->paddr);
- }
- }
+ return new UnimpFault("IPR memory space not implemented!");
} else {
// mark request as uncacheable
req->flags |= UNCACHEABLE;
@@ -136,6 +126,7 @@ AlphaTLB::checkCacheability(CpuRequestPtr &req)
#endif
}
}
+ return NoFault;
}
@@ -292,10 +283,8 @@ AlphaITB::regStats()
Fault
-AlphaITB::translate(CpuRequestPtr &req) const
+AlphaITB::translate(CpuRequestPtr &req, ExecContext *xc) const
{
- ExecContext *xc = req->xc;
-
if (AlphaISA::PcPAL(req->vaddr)) {
// strip off PAL PC marker (lsb is 1)
req->paddr = (req->vaddr & ~3) & PAddrImplMask;
@@ -368,9 +357,8 @@ AlphaITB::translate(CpuRequestPtr &req) const
if (req->paddr & ~PAddrImplMask)
return genMachineCheckFault();
- checkCacheability(req);
+ return checkCacheability(req);
- return NoFault;
}
///////////////////////////////////////////////////////////////////////
@@ -451,9 +439,8 @@ AlphaDTB::regStats()
}
Fault
-AlphaDTB::translate(CpuRequestPtr &req, bool write) const
+AlphaDTB::translate(CpuRequestPtr &req, ExecContext *xc, bool write) const
{
- ExecContext *xc = req->xc;
Addr pc = xc->readPC();
AlphaISA::mode_type mode =
@@ -583,9 +570,7 @@ AlphaDTB::translate(CpuRequestPtr &req, bool write) const
if (req->paddr & ~PAddrImplMask)
return genMachineCheckFault();
- checkCacheability(req);
-
- return NoFault;
+ return checkCacheability(req);
}
AlphaISA::PTE &
diff --git a/arch/alpha/tlb.hh b/arch/alpha/tlb.hh
index fe156b7e3..39faffbee 100644
--- a/arch/alpha/tlb.hh
+++ b/arch/alpha/tlb.hh
@@ -73,7 +73,7 @@ class AlphaTLB : public SimObject
return (unimplBits == 0) || (unimplBits == EV5::VAddrUnImplMask);
}
- static void checkCacheability(CpuRequestPtr &req);
+ static Fault checkCacheability(CpuRequestPtr &req);
// Checkpointing
virtual void serialize(std::ostream &os);
@@ -92,7 +92,7 @@ class AlphaITB : public AlphaTLB
AlphaITB(const std::string &name, int size);
virtual void regStats();
- Fault translate(CpuRequestPtr &req) const;
+ Fault translate(CpuRequestPtr &req, ExecContext *xc) const;
};
class AlphaDTB : public AlphaTLB
@@ -115,7 +115,7 @@ class AlphaDTB : public AlphaTLB
AlphaDTB(const std::string &name, int size);
virtual void regStats();
- Fault translate(CpuRequestPtr &req, bool write) const;
+ Fault translate(CpuRequestPtr &req, ExecContext *xc, bool write) const;
};
#endif // __ALPHA_MEMORY_HH__
diff --git a/arch/alpha/tru64/system.cc b/arch/alpha/tru64/system.cc
index d09a0c85d..2ad06d679 100644
--- a/arch/alpha/tru64/system.cc
+++ b/arch/alpha/tru64/system.cc
@@ -35,8 +35,8 @@
#include "cpu/exec_context.hh"
#include "kern/tru64/tru64_events.hh"
#include "kern/system_events.hh"
-#include "mem/functional/memory_control.hh"
-#include "mem/functional/physical.hh"
+#include "mem/physical.hh"
+#include "mem/port.hh"
#include "sim/builder.hh"
using namespace std;
@@ -46,12 +46,7 @@ Tru64AlphaSystem::Tru64AlphaSystem(Tru64AlphaSystem::Params *p)
{
Addr addr = 0;
if (kernelSymtab->findAddress("enable_async_printf", addr)) {
- Addr paddr = vtophys(physmem, addr);
- uint8_t *enable_async_printf =
- physmem->dma_addr(paddr, sizeof(uint32_t));
-
- if (enable_async_printf)
- *(uint32_t *)enable_async_printf = 0;
+ virtPort.write(addr, (uint32_t)0);
}
#ifdef DEBUG
@@ -96,7 +91,6 @@ Tru64AlphaSystem::~Tru64AlphaSystem()
BEGIN_DECLARE_SIM_OBJECT_PARAMS(Tru64AlphaSystem)
Param<Tick> boot_cpu_frequency;
- SimObjectParam<MemoryController *> memctrl;
SimObjectParam<PhysicalMemory *> physmem;
Param<string> kernel;
@@ -118,7 +112,6 @@ END_DECLARE_SIM_OBJECT_PARAMS(Tru64AlphaSystem)
BEGIN_INIT_SIM_OBJECT_PARAMS(Tru64AlphaSystem)
INIT_PARAM(boot_cpu_frequency, "frequency of the boot cpu"),
- INIT_PARAM(memctrl, "memory controller"),
INIT_PARAM(physmem, "phsyical memory"),
INIT_PARAM(kernel, "file that contains the kernel code"),
INIT_PARAM(console, "file that contains the console code"),
@@ -139,7 +132,6 @@ CREATE_SIM_OBJECT(Tru64AlphaSystem)
AlphaSystem::Params *p = new AlphaSystem::Params;
p->name = getInstanceName();
p->boot_cpu_frequency = boot_cpu_frequency;
- p->memctrl = memctrl;
p->physmem = physmem;
p->kernel_path = kernel;
p->console_path = console;
diff --git a/arch/alpha/vtophys.cc b/arch/alpha/vtophys.cc
index 40261426d..41e9b80a3 100644
--- a/arch/alpha/vtophys.cc
+++ b/arch/alpha/vtophys.cc
@@ -28,33 +28,35 @@
#include <string>
+#include "arch/alpha/ev5.hh"
#include "arch/alpha/vtophys.hh"
+#include "base/chunk_generator.hh"
#include "base/trace.hh"
#include "cpu/exec_context.hh"
-#include "mem/functional/physical.hh"
+#include "mem/vport.hh"
using namespace std;
using namespace AlphaISA;
AlphaISA::PageTableEntry
-kernel_pte_lookup(PhysicalMemory *pmem, Addr ptbr, AlphaISA::VAddr vaddr)
+AlphaISA::kernel_pte_lookup(FunctionalPort *mem, Addr ptbr, AlphaISA::VAddr vaddr)
{
Addr level1_pte = ptbr + vaddr.level1();
- AlphaISA::PageTableEntry level1 = pmem->phys_read_qword(level1_pte);
+ AlphaISA::PageTableEntry level1 = mem->read<uint64_t>(level1_pte);
if (!level1.valid()) {
DPRINTF(VtoPhys, "level 1 PTE not valid, va = %#\n", vaddr);
return 0;
}
Addr level2_pte = level1.paddr() + vaddr.level2();
- AlphaISA::PageTableEntry level2 = pmem->phys_read_qword(level2_pte);
+ AlphaISA::PageTableEntry level2 = mem->read<uint64_t>(level2_pte);
if (!level2.valid()) {
DPRINTF(VtoPhys, "level 2 PTE not valid, va = %#x\n", vaddr);
return 0;
}
Addr level3_pte = level2.paddr() + vaddr.level3();
- AlphaISA::PageTableEntry level3 = pmem->phys_read_qword(level3_pte);
+ AlphaISA::PageTableEntry level3 = mem->read<uint64_t>(level3_pte);
if (!level3.valid()) {
DPRINTF(VtoPhys, "level 3 PTE not valid, va = %#x\n", vaddr);
return 0;
@@ -63,7 +65,7 @@ kernel_pte_lookup(PhysicalMemory *pmem, Addr ptbr, AlphaISA::VAddr vaddr)
}
Addr
-vtophys(PhysicalMemory *xc, Addr vaddr)
+AlphaISA::vtophys(Addr vaddr)
{
Addr paddr = 0;
if (AlphaISA::IsUSeg(vaddr))
@@ -79,7 +81,7 @@ vtophys(PhysicalMemory *xc, Addr vaddr)
}
Addr
-vtophys(ExecContext *xc, Addr addr)
+AlphaISA::vtophys(ExecContext *xc, Addr addr)
{
AlphaISA::VAddr vaddr = addr;
Addr ptbr = xc->readMiscReg(AlphaISA::IPR_PALtemp20);
@@ -95,7 +97,7 @@ vtophys(ExecContext *xc, Addr addr)
paddr = vaddr;
} else {
AlphaISA::PageTableEntry pte =
- kernel_pte_lookup(xc->getPhysMemPtr(), ptbr, vaddr);
+ kernel_pte_lookup(xc->getPhysPort(), ptbr, vaddr);
if (pte.valid())
paddr = pte.paddr() | vaddr.offset();
}
@@ -107,162 +109,54 @@ vtophys(ExecContext *xc, Addr addr)
return paddr;
}
-uint8_t *
-ptomem(ExecContext *xc, Addr paddr, size_t len)
-{
- return xc->getPhysMemPtr()->dma_addr(paddr, len);
-}
-
-uint8_t *
-vtomem(ExecContext *xc, Addr vaddr, size_t len)
-{
- Addr paddr = vtophys(xc, vaddr);
- return xc->getPhysMemPtr()->dma_addr(paddr, len);
-}
void
-CopyOut(ExecContext *xc, void *dest, Addr src, size_t cplen)
+AlphaISA::CopyOut(ExecContext *xc, void *dest, Addr src, size_t cplen)
{
- Addr paddr;
- char *dmaaddr;
- char *dst = (char *)dest;
- int len;
+ uint8_t *dst = (uint8_t *)dest;
+ VirtualPort *vp = xc->getVirtPort(xc);
- paddr = vtophys(xc, src);
- len = min((int)(AlphaISA::PageBytes - (paddr & AlphaISA::PageOffset)),
- (int)cplen);
- dmaaddr = (char *)xc->getPhysMemPtr()->dma_addr(paddr, len);
- assert(dmaaddr);
+ vp->readBlob(src, dst, cplen);
- memcpy(dst, dmaaddr, len);
- if (len == cplen)
- return;
-
- cplen -= len;
- dst += len;
- src += len;
-
- while (cplen > AlphaISA::PageBytes) {
- paddr = vtophys(xc, src);
- dmaaddr = (char *)xc->getPhysMemPtr()->dma_addr(paddr,
- AlphaISA::PageBytes);
- assert(dmaaddr);
-
- memcpy(dst, dmaaddr, AlphaISA::PageBytes);
- cplen -= AlphaISA::PageBytes;
- dst += AlphaISA::PageBytes;
- src += AlphaISA::PageBytes;
- }
+ xc->delVirtPort(vp);
- if (cplen > 0) {
- paddr = vtophys(xc, src);
- dmaaddr = (char *)xc->getPhysMemPtr()->dma_addr(paddr, cplen);
- assert(dmaaddr);
-
- memcpy(dst, dmaaddr, cplen);
- }
}
void
-CopyIn(ExecContext *xc, Addr dest, void *source, size_t cplen)
+AlphaISA::CopyIn(ExecContext *xc, Addr dest, void *source, size_t cplen)
{
- Addr paddr;
- char *dmaaddr;
- char *src = (char *)source;
- int len;
-
- paddr = vtophys(xc, dest);
- len = min((int)(AlphaISA::PageBytes - (paddr & AlphaISA::PageOffset)),
- (int)cplen);
- dmaaddr = (char *)xc->getPhysMemPtr()->dma_addr(paddr, len);
- assert(dmaaddr);
-
- memcpy(dmaaddr, src, len);
- if (len == cplen)
- return;
-
- cplen -= len;
- src += len;
- dest += len;
-
- while (cplen > AlphaISA::PageBytes) {
- paddr = vtophys(xc, dest);
- dmaaddr = (char *)xc->getPhysMemPtr()->dma_addr(paddr,
- AlphaISA::PageBytes);
- assert(dmaaddr);
-
- memcpy(dmaaddr, src, AlphaISA::PageBytes);
- cplen -= AlphaISA::PageBytes;
- src += AlphaISA::PageBytes;
- dest += AlphaISA::PageBytes;
- }
+ uint8_t *src = (uint8_t *)source;
+ VirtualPort *vp = xc->getVirtPort(xc);
- if (cplen > 0) {
- paddr = vtophys(xc, dest);
- dmaaddr = (char *)xc->getPhysMemPtr()->dma_addr(paddr, cplen);
- assert(dmaaddr);
+ vp->writeBlob(dest, src, cplen);
- memcpy(dmaaddr, src, cplen);
- }
+ xc->delVirtPort(vp);
}
void
-CopyString(ExecContext *xc, char *dst, Addr vaddr, size_t maxlen)
+AlphaISA::CopyStringOut(ExecContext *xc, char *dst, Addr vaddr, size_t maxlen)
{
- Addr paddr;
- char *dmaaddr;
- int len;
-
- paddr = vtophys(xc, vaddr);
- len = min((int)(AlphaISA::PageBytes - (paddr & AlphaISA::PageOffset)),
- (int)maxlen);
- dmaaddr = (char *)xc->getPhysMemPtr()->dma_addr(paddr, len);
- assert(dmaaddr);
-
- char *term = (char *)memchr(dmaaddr, 0, len);
- if (term)
- len = term - dmaaddr + 1;
-
- memcpy(dst, dmaaddr, len);
-
- if (term || len == maxlen)
- return;
-
- maxlen -= len;
- dst += len;
- vaddr += len;
-
- while (maxlen > AlphaISA::PageBytes) {
- paddr = vtophys(xc, vaddr);
- dmaaddr = (char *)xc->getPhysMemPtr()->dma_addr(paddr,
- AlphaISA::PageBytes);
- assert(dmaaddr);
-
- char *term = (char *)memchr(dmaaddr, 0, AlphaISA::PageBytes);
- len = term ? (term - dmaaddr + 1) : AlphaISA::PageBytes;
+ int len = 0;
+ VirtualPort *vp = xc->getVirtPort(xc);
- memcpy(dst, dmaaddr, len);
- if (term)
- return;
+ do {
+ vp->readBlob(vaddr++, (uint8_t*)dst++, 1);
+ len++;
+ } while (len < maxlen && dst[len] != 0 );
- maxlen -= AlphaISA::PageBytes;
- dst += AlphaISA::PageBytes;
- vaddr += AlphaISA::PageBytes;
- }
-
- if (maxlen > 0) {
- paddr = vtophys(xc, vaddr);
- dmaaddr = (char *)xc->getPhysMemPtr()->dma_addr(paddr, maxlen);
- assert(dmaaddr);
-
- char *term = (char *)memchr(dmaaddr, 0, maxlen);
- len = term ? (term - dmaaddr + 1) : maxlen;
-
- memcpy(dst, dmaaddr, len);
+ xc->delVirtPort(vp);
+ dst[len] = 0;
+}
- maxlen -= len;
+void
+AlphaISA::CopyStringIn(ExecContext *xc, char *src, Addr vaddr)
+{
+ VirtualPort *vp = xc->getVirtPort(xc);
+ for (ChunkGenerator gen(vaddr, strlen(src), AlphaISA::PageBytes); !gen.done();
+ gen.next())
+ {
+ vp->writeBlob(gen.addr(), (uint8_t*)src, gen.size());
+ src += gen.size();
}
-
- if (maxlen == 0)
- dst[maxlen] = '\0';
+ xc->delVirtPort(vp);
}
diff --git a/arch/alpha/vtophys.hh b/arch/alpha/vtophys.hh
index 95430ce77..7ab14bc5b 100644
--- a/arch/alpha/vtophys.hh
+++ b/arch/alpha/vtophys.hh
@@ -32,19 +32,21 @@
#include "arch/alpha/isa_traits.hh"
class ExecContext;
-class PhysicalMemory;
+class FunctionalPort;
-AlphaISA::PageTableEntry
-kernel_pte_lookup(PhysicalMemory *pmem, Addr ptbr, AlphaISA::VAddr vaddr);
+namespace AlphaISA {
-Addr vtophys(PhysicalMemory *xc, Addr vaddr);
+PageTableEntry
+kernel_pte_lookup(FunctionalPort *mem, Addr ptbr, AlphaISA::VAddr vaddr);
+
+Addr vtophys(Addr vaddr);
Addr vtophys(ExecContext *xc, Addr vaddr);
-uint8_t *vtomem(ExecContext *xc, Addr vaddr, size_t len);
-uint8_t *ptomem(ExecContext *xc, Addr paddr, size_t len);
void CopyOut(ExecContext *xc, void *dst, Addr src, size_t len);
void CopyIn(ExecContext *xc, Addr dst, void *src, size_t len);
-void CopyString(ExecContext *xc, char *dst, Addr vaddr, size_t maxlen);
+void CopyStringOut(ExecContext *xc, char *dst, Addr vaddr, size_t maxlen);
+void CopyStringIn(ExecContext *xc, char *src, Addr vaddr);
+};
#endif // __ARCH_ALPHA_VTOPHYS_H__