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authorNathan Binkert <binkertn@umich.edu>2004-05-13 07:28:54 -0400
committerNathan Binkert <binkertn@umich.edu>2004-05-13 07:28:54 -0400
commit8bc3ce93cb46c00e82432449a90bc4ed1225afd5 (patch)
tree425b10cde88112b771ba1f60843b2e29c0c6afb0 /arch
parent6a26c92d6f18035177b9653ad6a87da5a7d93e0d (diff)
downloadgem5-8bc3ce93cb46c00e82432449a90bc4ed1225afd5.tar.xz
pass the address of both the old an new pcbb on context
switches. (Makes other uncommitted code easier to merge.) arch/alpha/ev5.cc: pass the address of both the old an new pcbb on context switches --HG-- extra : convert_revision : bff8c8d1b532ad5f9af6270169bbfb1b5c05256a
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/ev5.cc4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc
index 9b3ac5fff..468acdc55 100644
--- a/arch/alpha/ev5.cc
+++ b/arch/alpha/ev5.cc
@@ -303,6 +303,7 @@ Fault
ExecContext::setIpr(int idx, uint64_t val)
{
uint64_t *ipr = regs.ipr;
+ uint64_t old;
if (misspeculating())
return No_Fault;
@@ -355,8 +356,9 @@ ExecContext::setIpr(int idx, uint64_t val)
case AlphaISA::IPR_PALtemp23:
// write entire quad w/ no side-effect
+ old = ipr[idx];
ipr[idx] = val;
- kernelStats.context(ipr[idx]);
+ kernelStats.context(old, val);
Annotate::Context(this);
break;