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| author | Ali Saidi <saidi@eecs.umich.edu> | 2004-09-03 14:12:59 -0400 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2004-09-03 14:12:59 -0400 |
| commit | af620e118709e1a5272661c94641c3adf19fa524 (patch) | |
| tree | 3b8919d166664a2a3c7d6c09c919bb554d4f02c2 /arch | |
| parent | 8efb592e0b8a51056d75565cb970a99ef895ada5 (diff) | |
| download | gem5-af620e118709e1a5272661c94641c3adf19fa524.tar.xz | |
added system option to bin interrupt code seperately.
arch/alpha/ev5.cc:
set the mode explictly rather than having a bool user/notuser
cpu/simple_cpu/simple_cpu.hh:
there is no class Kernel
kern/kernel_stats.cc:
use cpu_mode_num
kern/kernel_stats.hh:
add interrupt mode and use cpu_mode_num rather than constant
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/system_events.cc:
kern/system_events.hh:
add events to change the mode to/from interrupt
sim/system.cc:
sim/system.hh:
add a pal symbol table
--HG--
extra : convert_revision : 9d30e826b72122062a5ea12d094f94760e75c66a
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/alpha/ev5.cc | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc index b0f2251dc..70b717353 100644 --- a/arch/alpha/ev5.cc +++ b/arch/alpha/ev5.cc @@ -447,7 +447,10 @@ ExecContext::setIpr(int idx, uint64_t val) break; case AlphaISA::IPR_DTB_CM: - kernelStats->mode((val & 0x18) != 0); + if (val & 0x18) + kernelStats->mode(Kernel::user); + else + kernelStats->mode(Kernel::kernel); case AlphaISA::IPR_ICM: // only write two mode bits - processor mode |