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authorErik Hallnor <ehallnor@umich.edu>2004-03-04 14:57:57 -0500
committerErik Hallnor <ehallnor@umich.edu>2004-03-04 14:57:57 -0500
commit7c089b2001afb93fe51b1a89456b15fd0d00c794 (patch)
treec5186e7fec84e54a093337fc96e72400a0faf6b5 /arch
parentcfb6f8fd01e19dbd0b3ce5cfa28d6f78f617e954 (diff)
downloadgem5-7c089b2001afb93fe51b1a89456b15fd0d00c794.tar.xz
Copy implementations
arch/alpha/isa_desc: Need to return fault for copy operations. cpu/exec_context.hh: Add temporary storage to pass source address from copy load to copy store cpu/simple_cpu/simple_cpu.cc: Implement copy functions. cpu/simple_cpu/simple_cpu.hh: Return fault --HG-- extra : convert_revision : 98e5ce563449d6057ba45c70eece9235f1649a90
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/isa_desc4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc
index 46fb306a4..41f7388e0 100644
--- a/arch/alpha/isa_desc
+++ b/arch/alpha/isa_desc
@@ -1855,7 +1855,7 @@ decode OPCODE default Unknown::unknown() {
0x2a: ldl_l({{ EA = Rb + disp; }}, {{ Ra.sl = Mem.sl; }}, LOCKED);
0x2b: ldq_l({{ EA = Rb + disp; }}, {{ Ra.uq = Mem.uq; }}, LOCKED);
0x20: copy_load({{EA = Ra;}},
- {{memAccessObj->copySrcTranslate(EA);}},
+ {{fault = memAccessObj->copySrcTranslate(EA);}},
IsMemRef, IsLoad, IsCopy);
}
@@ -1877,7 +1877,7 @@ decode OPCODE default Unknown::unknown() {
0x26: sts({{ EA = Rb + disp; }}, {{ Mem.ul = t_to_s(Fa.uq); }});
0x27: stt({{ EA = Rb + disp; }}, {{ Mem.df = Fa; }});
0x24: copy_store({{EA = Rb;}},
- {{memAccessObj->copy(EA);}},
+ {{fault =memAccessObj->copy(EA);}},
IsMemRef, IsStore, IsCopy);
}