diff options
author | Nathan Binkert <binkertn@umich.edu> | 2004-02-09 10:36:32 -0500 |
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committer | Nathan Binkert <binkertn@umich.edu> | 2004-02-09 10:36:32 -0500 |
commit | 087334bfe5c49e44d13e6b120691bd73002c7c71 (patch) | |
tree | a474592d2f6a1b50c3ae2e998d1ea537e4fae9cb /arch | |
parent | f1aca5e6c52551b21ec864a4d8e88ddc2430c67e (diff) | |
parent | 411d5497fa2bd28c9cf4ac1fccf806ee8a1ff33d (diff) | |
download | gem5-087334bfe5c49e44d13e6b120691bd73002c7c71.tar.xz |
Merge zizzer.eecs.umich.edu:/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/ziff/z/binkertn/research/m5/memory
--HG--
extra : convert_revision : 9f385ee5b6958373a9a1bc600eb3e5e8b7987f38
Diffstat (limited to 'arch')
-rw-r--r-- | arch/alpha/alpha_memory.cc | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc index 0f9ad2cfc..00e97250f 100644 --- a/arch/alpha/alpha_memory.cc +++ b/arch/alpha/alpha_memory.cc @@ -90,8 +90,17 @@ AlphaTlb::checkCacheability(MemReqPtr &req) if (req->paddr & PA_UNCACHED_BIT) { if (PA_IPR_SPACE(req->paddr)) { // IPR memory space not implemented - if (!req->xc->misspeculating()) - panic("IPR memory space not implemented! PA=%x\n", req->paddr); + if (!req->xc->misspeculating()) { + switch (req->paddr) { + case 0xFFFFF00188: + req->data = 0; + break; + + default: + panic("IPR memory space not implemented! PA=%x\n", + req->paddr); + } + } } else { // mark request as uncacheable req->flags |= UNCACHEABLE; |