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author | Gabe Black <gblack@eecs.umich.edu> | 2006-03-07 09:11:00 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-03-07 09:11:00 -0500 |
commit | 531216e9f385c346433a02a83d60ad5d03ced47f (patch) | |
tree | 878816b656a1559129f6b5f6e91356fb1936f3f8 /arch | |
parent | b0eeb15d72722f8ae5a1e653ee5bcbf591c1531b (diff) | |
download | gem5-531216e9f385c346433a02a83d60ad5d03ced47f.tar.xz |
Got rid of some commented out code.
--HG--
extra : convert_revision : 7de82ed72650d877cdb2ecb66c61ae41117658d9
Diffstat (limited to 'arch')
-rw-r--r-- | arch/alpha/isa_traits.hh | 35 |
1 files changed, 1 insertions, 34 deletions
diff --git a/arch/alpha/isa_traits.hh b/arch/alpha/isa_traits.hh index a551db485..742539e89 100644 --- a/arch/alpha/isa_traits.hh +++ b/arch/alpha/isa_traits.hh @@ -303,37 +303,7 @@ extern const int reg_redir[NumIntRegs]; template <class XC> void zeroRegisters(XC *xc); - -//typedef AlphaISA TheISA; - -//typedef TheISA::MachInst MachInst; -//typedef TheISA::Addr Addr; -//typedef TheISA::RegIndex RegIndex; -//typedef TheISA::IntReg IntReg; -//typedef TheISA::IntRegFile IntRegFile; -//typedef TheISA::FloatReg FloatReg; -//typedef TheISA::FloatRegFile FloatRegFile; -//typedef TheISA::MiscReg MiscReg; -//typedef TheISA::MiscRegFile MiscRegFile; -//typedef TheISA::AnyReg AnyReg; -//typedef TheISA::RegFile RegFile; - -//const int NumIntRegs = TheISA::NumIntRegs; -//const int NumFloatRegs = TheISA::NumFloatRegs; -//const int NumMiscRegs = TheISA::NumMiscRegs; -//const int TotalNumRegs = TheISA::TotalNumRegs; -//const int VMPageSize = TheISA::VMPageSize; -//const int LogVMPageSize = TheISA::LogVMPageSize; -//const int ZeroReg = TheISA::ZeroReg; -//const int StackPointerReg = TheISA::StackPointerReg; -//const int GlobalPointerReg = TheISA::GlobalPointerReg; -//const int ReturnAddressReg = TheISA::ReturnAddressReg; -//const int ReturnValueReg = TheISA::ReturnValueReg; -//const int ArgumentReg0 = TheISA::ArgumentReg0; -//const int ArgumentReg1 = TheISA::ArgumentReg1; -//const int ArgumentReg2 = TheISA::ArgumentReg2; -//const int BranchPredAddrShiftAmt = TheISA::BranchPredAddrShiftAmt; -const Addr MaxAddr = (Addr)-1; + const Addr MaxAddr = (Addr)-1; }; #if !FULL_SYSTEM @@ -386,9 +356,6 @@ AlphaISA::makeExtMI(AlphaISA::MachInst inst, const uint64_t &pc) { } #if FULL_SYSTEM -//typedef TheISA::InternalProcReg InternalProcReg; -//const int NumInternalProcRegs = TheISA::NumInternalProcRegs; -//const int NumInterruptLevels = TheISA::NumInterruptLevels; #include "arch/alpha/ev5.hh" #endif |