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authorGabe Black <gblack@eecs.umich.edu>2006-02-27 03:57:15 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-02-27 03:57:15 -0500
commit444f520f7e2da9468fa622dcf51859915bd31fd6 (patch)
tree5d5a217fcc16fe1b89c9625867a54ef87c499813 /arch
parent1a0b326f5d4fafaef206a97ddd02598e120aebb9 (diff)
downloadgem5-444f520f7e2da9468fa622dcf51859915bd31fd6.tar.xz
MachineCheckFaults and AlignmentFaults are now generated by the ISA, rather than being created directly.
arch/alpha/alpha_memory.cc: cpu/base_dyn_inst.cc: dev/alpha_console.cc: dev/pcidev.hh: dev/sinic.cc: MachineCheckFaults are now generated by the ISA, rather than being created directly. --HG-- extra : convert_revision : 34a7da41639e93be21ed70dac681b27480008d19
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/alpha_memory.cc6
-rw-r--r--arch/alpha/faults.cc4
-rw-r--r--arch/alpha/faults.hh31
3 files changed, 34 insertions, 7 deletions
diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc
index b2a829711..11baed106 100644
--- a/arch/alpha/alpha_memory.cc
+++ b/arch/alpha/alpha_memory.cc
@@ -380,7 +380,7 @@ AlphaITB::translate(MemReqPtr &req) const
// check that the physical address is ok (catch bad physical addresses)
if (req->paddr & ~PAddrImplMask)
- return new MachineCheckFault;
+ return genMachineCheckFault();
checkCacheability(req);
@@ -511,7 +511,7 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const
fault(req, write ? MM_STAT_WR_MASK : 0);
DPRINTF(TLB, "Alignment Fault on %#x, size = %d", req->vaddr,
req->size);
- return new AlignmentFault;
+ return genAlignmentFault();
}
if (pc & 0x1) {
@@ -621,7 +621,7 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const
// check that the physical address is ok (catch bad physical addresses)
if (req->paddr & ~PAddrImplMask)
- return new MachineCheckFault;
+ return genMachineCheckFault();
checkCacheability(req);
diff --git a/arch/alpha/faults.cc b/arch/alpha/faults.cc
index bbddadabf..1df0de7c1 100644
--- a/arch/alpha/faults.cc
+++ b/arch/alpha/faults.cc
@@ -32,6 +32,10 @@ FaultName AlphaFault::_name = "alphafault";
FaultVect AlphaFault::_vect = 0x0000;
FaultStat AlphaFault::_stat;
+FaultVect AlphaMachineCheckFault::_vect = 0x0401;
+
+FaultVect AlphaAlignmentFault::_vect = 0x0301;
+
FaultName ResetFault::_name = "reset";
FaultVect ResetFault::_vect = 0x0001;
FaultStat ResetFault::_stat;
diff --git a/arch/alpha/faults.hh b/arch/alpha/faults.hh
index bd5163a7d..2004c0911 100644
--- a/arch/alpha/faults.hh
+++ b/arch/alpha/faults.hh
@@ -31,7 +31,7 @@
#include "sim/faults.hh"
-// The reasoning behind the name and vect functions is in sim/faults.hh
+// The design of the "name" and "vect" functions is in sim/faults.hh
typedef const Addr FaultVect;
@@ -47,6 +47,32 @@ class AlphaFault : public FaultBase
virtual FaultStat & stat() {return _stat;}
};
+class AlphaMachineCheckFault : public MachineCheckFault
+{
+ private:
+ static FaultVect _vect;
+ public:
+ FaultVect vect() {return _vect;}
+};
+
+class AlphaAlignmentFault : public AlignmentFault
+{
+ private:
+ static FaultVect _vect;
+ public:
+ FaultVect vect() {return _vect;}
+};
+
+static inline Fault genMachineCheckFault()
+{
+ return new AlphaMachineCheckFault;
+}
+
+static inline Fault genAlignmentFault()
+{
+ return new AlphaAlignmentFault;
+}
+
class ResetFault : public AlphaFault
{
private:
@@ -215,7 +241,4 @@ class IntegerOverflowFault : public AlphaFault
FaultStat & stat() {return _stat;}
};
-//Fault * ListOfFaults[];
-//int NumFaults;
-
#endif // __FAULTS_HH__