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author | Korey Sewell <ksewell@umich.edu> | 2006-02-10 03:27:19 -0500 |
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committer | Korey Sewell <ksewell@umich.edu> | 2006-02-10 03:27:19 -0500 |
commit | 5cfc5e80802f1b5aa240a289bcf0267b5f829aa4 (patch) | |
tree | f0c018e47281f5bad867a6b5dea4bc41bf0b1334 /base/random.hh | |
parent | fb10300c4f23c8f9498f805ea95590e549b35fe5 (diff) | |
download | gem5-5cfc5e80802f1b5aa240a289bcf0267b5f829aa4.tar.xz |
The first fully coded version of decoder.isa!!!!!
=================================================
-every MIPS32 ISA is represented with some type
of code block.
-any instruction that doesnt have a code block
would be of format WarnUnimpl. Examples of the
ones I am waiting on further info to implement
are the TLB register insts, memory consistency
instructions (ll,sc,etc.) and software debug
insts.
--HG--
extra : convert_revision : 4a26c72e4fa1f63b8689fe2631a7508daf660969
Diffstat (limited to 'base/random.hh')
0 files changed, 0 insertions, 0 deletions